Jump to content

  • Log In with Google      Sign In   
  • Create Account

#ActualWaterlimon

Posted 18 December 2012 - 01:38 PM

I guess it means that a SIMD thing can hold lets say a 3 component vector in one register, with another in other, ad then add them and put the result in lets say the first one.

I think it goes like that.
edit: Oh and if its 64 bits, it might treat it as 2 ints or lets say 4 shorts etc. so its flexible.

#1Waterlimon

Posted 18 December 2012 - 01:37 PM

I guess it means that a SIMD thing can hold lets say a 3 component vector in one register, with another in other, ad then add them and put the result in lets say the first one.

I think it goes like that.

PARTNERS