Yes, it's more efficiently implemented with an iterative algorithm, where each clock cycle performs one iteration.

[edit] internally, the algorithm of couse has to use integer division

http://stackoverflow.com/questions/8401194/the-integer-division-algorithm-of-x86-processors

[/edit]

Note that CPUs often have some kind of RCP op, which very quickly computes an approximation to 1/x, rather than y/x. Sometimes 'close enough' results are ok (e.g. In graphics), where you'd use y*rcp(x) instead of y/x.

You can find the human-readable algorithms by searching for "floating point multiplication", etc, and the format's layout is on Wikipedia. I'm not sure about finding details about what the logic-gate/transistor diagrams would look like... the most advanced thing I've drawn in hardware diagrams is an integer adder ;-)

Maybe the famous "what every programmer should know about floating point" document would be illuminating?

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### #2Hodgman

Posted 17 April 2013 - 08:47 PM

Yes, it's more efficiently implemented with an iterative algorithm, where each clock cycle performs one iteration.

Note that CPUs often have some kind of RCP op, which very quickly computes an approximation to 1/x, rather than y/x. Sometimes 'close enough' results are ok (e.g. In graphics), where you'd use y*rcp(x) instead of y/x.

You can find the human-readable algorithms by searching for "floating point multiplication", etc, and the format's layout is on Wikipedia. I'm not sure about finding details about what the logic-gate/transistor diagrams would look like... the most advanced thing I've drawn in hardware diagrams is an integer adder ;-)

Maybe the famous "what every programmer should know about floating point" document would be illuminating?

Note that CPUs often have some kind of RCP op, which very quickly computes an approximation to 1/x, rather than y/x. Sometimes 'close enough' results are ok (e.g. In graphics), where you'd use y*rcp(x) instead of y/x.

You can find the human-readable algorithms by searching for "floating point multiplication", etc, and the format's layout is on Wikipedia. I'm not sure about finding details about what the logic-gate/transistor diagrams would look like... the most advanced thing I've drawn in hardware diagrams is an integer adder ;-)

Maybe the famous "what every programmer should know about floating point" document would be illuminating?

### #1Hodgman

Posted 17 April 2013 - 08:43 PM

Yes, it's more efficiently implemented with an iterative algorithm, where each clock cycle performs one iteration.

You can find the human-readable algorithms by searching for "floating point multiplication", etc, and the format's layout is on Wikipedia. I'm not sure about finding details about what the logic-gate/transistor diagrams would look like... the most advanced thing I've drawn in hardware diagrams is an integer adder ;-)

Maybe the famous "what every programmer should know about floating point" document would be illuminating?

You can find the human-readable algorithms by searching for "floating point multiplication", etc, and the format's layout is on Wikipedia. I'm not sure about finding details about what the logic-gate/transistor diagrams would look like... the most advanced thing I've drawn in hardware diagrams is an integer adder ;-)

Maybe the famous "what every programmer should know about floating point" document would be illuminating?