A store gets an address from a register or immediate value and a value to store, and writes it to memory(or the write buffer if that's included in your model.)
Loads and stores can take many clock cycles more than any other instruction because they deal with memory.
BEQ, presumably branch on equal, reads a status register on the ALU, and if it's set appropriately, changes the instruction pointer to point to an offset specified by an immediate value.
It's hard to be more helpful without knowing the specific model your computer architecture course is using. So you should probably ask your professor or people who are familiar with that particular course and can see the assignments you're struggling with.
Yeah that was sloppy of me to use. I changed my above post not to mention IP.
Just to clarify one thing: IP ("Instruction Pointer") is a synonym for PC ("Program Counter"), commonly used in the x86 architecture.