Members - Reputation: 137
Posted 05 April 2012 - 10:43 PM
1. The incoming virtual address is divided into a page table number, a page number, and an offset.
2. The process desriptor base register (PDBR) in the CPU tells where the directory starts.
3. The page table number is multiplied by four to use as an offset into the directory, and the directory entry is looked up.
4. The directory entry contains the address of the page table, and validity and protection information. If this information says that either the page table isn't present in memory or the protections aren't OK, the translation stops and an exception is raised.
5. The page number is multiplied by four to use as an offset into the page table, and the page table entry is looked up.
6. The page table entry contains the address of the page, and validity and protection information. If this information says that either the page isn't present in memory or the protections aren't OK, the translation stops and an exception is raised.
7. The offset is used as an index into the page.
8. The data is at the address finally arrived at.
And that all makes sense up to step 6 which is where I get confused because the table entry format only specifies 20 bits for the physical page frame address which means the physical page address has to be in a 1 megabyte range, or are the 20 bits shifted left 12 bits, (multiplied by 4096: size of page) giving it the ability to address 4 gigabytes?
Senior Moderators - Reputation: 7680
Posted 05 April 2012 - 11:42 PM
In time the project grows, the ignorance of its devs it shows, with many a convoluted function, it plunges into deep compunction, the price of failure is high, Washu's mirth is nigh.
ScapeCode - Blog | SlimDX
Members - Reputation: 232
Posted 04 May 2012 - 05:56 PM
The 'obsolete' segment registers and the upper 20 bits are used to figure out what real page has the memory, and the lower 12 bits are addressed into that to find the bits.