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Naivete Challenged: Interleaving arrays causes slow performance?


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#1 Lil_Lloyd   Members   -  Reputation: 287

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Posted 28 January 2013 - 08:06 AM

Ok, so I was thinking about how to speed up my opengl application, and remembered hearing something about interleaving array data. To my simple mind it seemed that when I pass attributes to a shader in separate buffer objects some kind of jumping around in the video cards' memory would occur, so if I interleaved the data for every vertex then this should provide the benefit of locality of reference like in a cache, and things should speed up.

 

However after some experimenting it cause a decline of 2 frames per second in my overall speed. So WHY does this happen? I'm clearly drinking from the wrong bottle of GL goodness. 



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#2 Ashaman73   Crossbones+   -  Reputation: 6881

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Posted 28 January 2013 - 08:15 AM

2 frames per second

2 frames of what ? FPS is not the best measurement, 2 fps of 4 fps is much more than 2 fps of 10000 fps.

 

From what you describes I would say, that vertex perfomance is not your bottleneck and a drop of 2 fps of X is not a proof of interlaeving arrays are slower than not interleaved ones.


Edited by Ashaman73, 28 January 2013 - 08:16 AM.


#3 Lil_Lloyd   Members   -  Reputation: 287

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Posted 28 January 2013 - 08:17 AM

2 fps down from 13.5 fps to 11.3 fps averages according to gDebugger



#4 swiftcoder   Senior Moderators   -  Reputation: 9739

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Posted 28 January 2013 - 09:53 AM

so if I interleaved the data for every vertex then this should provide the benefit of locality of reference like in a cache, and things should speed up.

Did you make sure that each vertex is a power-of-2 size? If your vertex is an odd size it will cross multiple cache lines - 16, 32 or 64 bytes are typically good sizes.


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#5 mhagain   Crossbones+   -  Reputation: 7574

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Posted 28 January 2013 - 11:01 AM

As a general rule interleaving should be faster, but there is one case in which it may be slower, and that's if the per-vertex pipeline is either implemented in or being emulated by software.  In that case splitting off the position component of your arrays, and padding it to 4 floats to better allow for SIMD optimizations in your driver, may be the optimal solution.

 

You haven't really given much info about the kind of workload you're running or what kind of hardware you've got, but some circumstances that can cause per-vertex to run in software would include having older graphics hardware that doesn't support hardware T&L (some Intel integrateds from about 5/6 years or more ago would fall under this category), or exceeding a hardware limit/trying to do something that's allowed by the GL spec but is not actually supported in hardware (that may include using GL_UNSIGNED_INT for your GL_ELEMENT_ARRAY_BUFFER on older hardware - again, you have to go back at least 6 years for this - or using GL_UNSIGNED_BYTE on any hardware).  If any of this sounds familiar you may have just identified your cause.


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#6 Lil_Lloyd   Members   -  Reputation: 287

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Posted 28 January 2013 - 07:53 PM

so if I interleaved the data for every vertex then this should provide the benefit of locality of reference like in a cache, and things should speed up.

Did you make sure that each vertex is a power-of-2 size? If your vertex is an odd size it will cross multiple cache lines - 16, 32 or 64 bytes are typically good sizes.

 

Aha! I had very odd vertex sizes, 12 bytes for a position, 12 bytes for a normal, 8 bytes for a texture or  just 12 bytes for a position, 8 bytes for a texture. So I will pad the vertices, textures and normals out to 16 bytes each but make each stride between a whole bunch of vertex data 64 bytes as 48 bytes isn't a power of two. Is this a good strategy?

 

Are there any useful links or articles concerning this kind of thing and the strategies you should use?

 

 

 

As a general rule interleaving should be faster, but there is one case in which it may be slower, and that's if the per-vertex pipeline is either implemented in or being emulated by software.  In that case splitting off the position component of your arrays, and padding it to 4 floats to better allow for SIMD optimizations in your driver, may be the optimal solution.

 

You haven't really given much info about the kind of workload you're running or what kind of hardware you've got, but some circumstances that can cause per-vertex to run in software would include having older graphics hardware that doesn't support hardware T&L (some Intel integrateds from about 5/6 years or more ago would fall under this category), or exceeding a hardware limit/trying to do something that's allowed by the GL spec but is not actually supported in hardware (that may include using GL_UNSIGNED_INT for your GL_ELEMENT_ARRAY_BUFFER on older hardware - again, you have to go back at least 6 years for this - or using GL_UNSIGNED_BYTE on any hardware).  If any of this sounds familiar you may have just identified your cause.

 

I'm using an AMD HD Radeon 4200 card. Is this a terrible Graphics card?



#7 L. Spiro   Crossbones+   -  Reputation: 12788

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Posted 29 January 2013 - 02:52 AM

Did you make sure that each vertex is a power-of-2 size? If your vertex is an odd size it will cross multiple cache lines - 16, 32 or 64 bytes are typically good sizes.

 
Aha! I had very odd vertex sizes, 12 bytes for a position, 12 bytes for a normal, 8 bytes for a texture or  just 12 bytes for a position, 8 bytes for a texture. So I will pad the vertices, textures and normals out to 16 bytes each but make each stride between a whole bunch of vertex data 64 bytes as 48 bytes isn't a power of two. Is this a good strategy?

Actually it isn’t about it being a power of 2, but a multiple of the cache size, which is usually 16 or 32. MSDN quotes 32 explicitly for certain cases of vertex buffers but my testing reveals this to improve the performance in all cases, not just what they list.  Of course, their documentation is for Direct3D, but cache issues and friends are a universal issue.

Performance Optimizations

 

Also, we are not talking about padding each vertex-buffer element.  12-byte normals and positions (etc.) are completely normal.

This padding is between each vertex in the buffer, not each element of each vertex.

Normally once you interleave position, normals, UV’s, tangents, and bitangents, you have 56-byte vertices.  This should be padded out to 64.

 

 

L. Spiro


Edited by L. Spiro, 29 January 2013 - 02:53 AM.

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#8 swiftcoder   Senior Moderators   -  Reputation: 9739

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Posted 29 January 2013 - 07:34 AM

Actually it isn’t about it being a power of 2, but a multiple of the cache size, which is usually 16 or 32.

Sure. And a power of two will always be an even multiple/divisor of the cache size.

It's accurate enough for a rule of thumb *shrugs*

Aha! I had very odd vertex sizes, 12 bytes for a position, 12 bytes for a normal, 8 bytes for a texture

12 + 12 + 8 = 32 bytes, which is just the right size for cache efficiency.

If you weren't interleaving these you'd have to be more careful about the individual sizes, but for an interleaved vertex it's the structure as a whole that matters.

Edited by swiftcoder, 29 January 2013 - 07:37 AM.

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