You need a guarantee the generated ISA performs all calculations in the exact same order, which you don't get with IEEE conformance, not even if you use the same HLSL compiler.

Floating point math is not associative, so a compiler that reorders instructions without a setting like -ffast-math is not very trustworthy. But anyway, I was recommending OpenCL or CUDA, not HLSL.

1. IEEE does not define instruction order.
2. Even if it did, IEEE does not enforce the intermediate precision.
3. You're still thinking of the compiler that generates assembly, when what you actually run is compiled by the driver that compiles D3D byte assembly into ISA assembly. HLSL -> D3D Assembly -> ISA assembly. The driver may will reorder your instructions when generating the ISA, even if you didn't pass -ffast-math to fxc (because that only affects D3D assembly generation). This does not affect OpenCL or CUDA though, but OP asked about HLSL. Furthermore OpenCL/CUDA strongly suggests operation is not of a graphics nature, but rather GPGPU, which contradicts your statement of "more or less" being acceptable because it will be used for graphics.