There was an error within Tutorial 11 that is now fixed.
The problem was that I was loading and executing the Kernel from 0x10000, which is incorrect.
The Kernel should be loaded and executed to 0x100000, which is 1 MB. (Note the extra "0")
We can easily verify this by converting 0x100000 to decimal, and compare it with the value of a meg:
0x100000 = 1048576 ; the address to load at
1024 * 1024 = 1048576 ; Get amount of bytes in a meg
I forgot to check it last time, sorry about that[smile]
Everything is fixed again, though.
Im adding Processor Architecture inside of the System Architecture tutorial right now. It covers every little component of the Pentium III, how they communicate and interact, and what they do.
It also covers decoding machine instructions into Microcode for the processor, and very basic Microprogramming.
Microprogramming is a very low level language--even lower then Machine Language produced by Assemblers. The Instruction Decoder inside the CPU decodes the machine instruction into what is called "Microinstructions", that can either be hard wired into the controller, or stored within a special area of memory to be executed on an as needed bases.
Microcode is a complex VERY low level direct hardware control programming. I personally do not know that much about Microprogramming simply because I cannot. It is impossible to program in Microcode without extensive knowledge of the controller you are programming--at the electronic and component level. This is why, normally Microprogrammers are Design Engineers who are working on the design of the controller itself.
Yes, it is that hardware dependent and low level.[smile]
Here is some Microcode from Wikipedia to demonstrates it for those who may be
interested. I cleaned it up to make it easier to read:
# Any line starting with a number-sign is a comment
# This is just a label, the ordinary way assemblers symbolically represent a
# memory address.
# To prepare for the next instruction, the instruction-decode microcode has already
# moved the program counter to the memory address register. This instruction fetches
# the target address of the jump instruction from the memory word following the
# jump opcode, by copying from the memory data register to the memory address register.
# This gives the memory system two clock ticks to fetch the next
# instruction to the memory data register for use by the instruction decode.
# The sequencer instruction "next" means just add 1 to the control word address.
MDR, NONE, MAR, COPY, NEXT, NONE
# This places the address of the next instruction into the Program Counter (PC).
# This gives the memory system a clock tick to finish the fetch started on the
# previous microinstruction.
# The sequencer instruction is to jump to the start of the instruction decode.
MAR, 1, PC, ADD, JMP, InstructionDecode
# The instruction decode is not shown, because it's usually a mess, very particular
# to the exact processor being emulated. Even this example is simplified.
# Many CPUs have several ways to calculate the address, rather than just fetching
# it from the word following the op-code. Therefore, rather than just one
# jump instruction, those CPUs have a family of related jump instructions.
I like this cat :)