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Computer Architecture

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Im taking my Computer Architecture tutorial into a new perspective.

In alot of assembly language tutorials (if not all) go briefly over how things really work inside the PC. I am even referring to the famous online book The Art of assembly language.

The explain computer architecture at an abstract level. It works, but does not explain how our code actually works. i.e., How does the processor actually use our instructions? How does our instructions control hardware?

Worst of all--the processor. Considered the "brain" of the computer, and the most important controller within the PC. This is normally either skipped over, or explained at a very abstract level.

I want the Computer Architecture tutorial to describe everything. I do not want it at the electronics level (As that is a different field), but at the internal component level. This way, we can see exactally how everything works within the computer.

This is the end plan, anyway. It will take a long time (overall), so I am focusing on one part at a time, while completing the main series.

If I decide to write an assembly language tutorial, I will include this as well.


As a simple example, the Pentium III processor includes quite a few components. This is the processor I plan on dissecting the processor within the tutorial. Understanding what these components are, and how they communicate with each other will answer how the processor executes instructions, processor architecture, and how it communicates with the system bus.

Processor Components - Pentium III:

  • L2: Level 2 Cache
  • CLK: Clock
  • PIC: Programmable Interrupt Controller
  • EBL: Front Bus Logic
  • BBL: Back Bus Logic
  • IEU: Integer Execution Unit
  • FEU: Floating Point Execution Unit
  • MOB: Memory Order Buffer
  • MIU: Memory Interface Unit
  • DCU: Data Cach Unit
  • IFU: Instruction Fetch Unit
  • ID: Instruction Decoder
  • ROB: Re-Order Buffer
  • MS: Microinstruction Sequencer
  • BTB: Branch Target Buffer
  • BAC: Branch Allocater Buffer
  • RAT: Register Alias Table
  • SIMD: Packed floating point
  • DTLB: Data TLB
  • RS: Reservation Station
  • PMH: Page Miss Handler
  • PFU: Pre-Fetch Unit
  • TAP: Test Access Port

  • The EBL interfaces to the System Bus.

    The first PIC is within the processor, and maps to the first 8 IRQs within the IVT. The processor automatically has the PIC generate an interrupt if there is an internal problem. We will need to remap these interrupts through this PIC.

    ID converts the current machine instruction to a microinstruction that MS uses.

    I plan on going over everything within the upgraded tutorial[smile]

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