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Some info on SPU's

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Norman Barrows

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blog-0233251001366062055.jpg
[color=rgb(40,40,40)][font=arial]Some info on SPUs:[/font][/color]

[color=rgb(40,40,40)][font=arial]SPU Architecture description (includes bus fetch speeds!).[/font][/color]
[color=rgb(40,40,40)][font=arial]Nice. Anyone who took computer architecture will probably find it interesting, it's one bad ass little chip![/font][/color]
http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.61.710&rep=rep1&type=pdf


[color=rgb(40,40,40)][font=arial]Wikipedia info on the "Cell" processor:[/font][/color]
http://en.wikipedia.org/wiki/Cell_(microprocessor)#Synergistic_Processing_Elements_.28SPE.29

[color=rgb(40,40,40)][font=arial]SPU instruction set (PS3 implementation):[/font][/color]
http://www.ps3devwiki.com/wiki/Synergistic_Processing_Unit_(SPU)

[color=rgb(40,40,40)][font=arial]SPU Application Binary Interface Specification (IBM documents):[/font][/color]
https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/76CA6C7304210F3987257060006F2C44/$file/SPU_ISA_v1.2_27Jan2007_pub.pdf
https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/02E544E65760B0BF87257060006F8F20/$file/SPU_ABI-Specification_1.9.pdf[color=rgb(40,40,40)][font=arial] [/font][/color]
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