Jump to content
The term cache refers to a fast intermediate memory within a larger memory system (Handy, 1993). Cache memory, utilized on machines such as the IBM System/360 Model 91 as early as 1968, was created to address the von Neumann bottleneck. Despite the efforts of engineers, early computer processors processed information much faster than they could access information from main memory. The low ratio of processor speed to memory access time in this case was so common on von Neumann machines that it became known as the von Neumann bottleneck (Baker, 1994). The introduction of cache memory, a special form of random access memory (RAM), helps to eliminate this bottleneck by providing one-cycle memory access to the processor (Hayes, 1998).
Cache memory serves as a buffer between a CPU and main memory (Hayes, 1998). Data and instructions located inside cache memory may be accessed significantly faster than data and instructions in main memory. Typically, the larger the cache, the faster the computer runs as a whole (Corporate Technology Direct, 1996).
Data words are stored within the cache data memory portion in small groups called cache blocks. Each cache block is additionally marked by a block address, called a tag. The collection of tag addresses are stored within the cache tag memory.
One common type of cache memory organization is called the "look-aside" cache, as shown in Figure 2. A look-aside cache allows both the cache and main memory to be directly connected to the system bus. In this design, the CPU firsts requests a block of memory from the cache. The cache (M1) then compares the incoming address to the tag addresses that currently exist in cache tag memory. If a match is found, a cache hit occurs. The CPU then accesses this memory directly, thus eliminating any involvement of M2. If a match is not found, a cache miss occurs. In the event of a cache miss, a block of memory in the cache is replaced with the desired block of memory which exists in main memory (M2). The process of replacing a block in cache memory with a block in main memory is done by first sending a request to main memory, which in turn transfers memory over the system bus. The transfer of memory from the cache to the CPU is much faster than the transfer of memory from main memory to the cache, which makes cache memory a good technique for speeding up data processing (Hayes, 1998).
Baker, H.G. (1994, March). Linear logic and permutation stacks--the forth shall
be first. ACM sigarch computer archive, pp. 34-43.
Bruce, K.B. (1998). CS334 lecture 2 [lecture notes]. Williams College.
Corporate Technology Direct (1996). What is cache memory? Retrieved March 25, 1999 from the
World Wide Web: http://www.corporatetech.com/memory/cache_memory.html
Handy, J. (1993). The cache memory book. pp. 54-56.
Hayes, J.P. (1998). Computer architecture and organization. pp. 452-454.
Slater, M. (1997, August). AMD's K6 kicker. Computer shopper, pp. 562-563, 566
GameDev.netâ„˘, the GameDev.net logo, and GDNetâ„˘ are trademarks of GameDev.net, LLC.