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outRider

GCC, instruction reordering

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I have a problem, whereby GCC when going through its optimisation routines reorders my code for its own reasons. This is fine by me, except that in some instances I have memory-mapped registers that I access multiple times, which GCC doesn''t quite see and does the following: say I have two regs, REG_A, REG_B, both are declared as volatile, if I have a block of code REG_A = x; REG_B = 1; REG_A = y; REG_B = 1; REG_A = z; REG_B = 1; the volatile prevents the removal of the last two blocks as redundant, but with reordering I get REG_A = x; REG_A = y; REG_A = z; REG_B = 1; REG_B = 1; REG_B = 1; which is completely useless and not the same at all where hardware registers are concerned. To stop that I stick asm volatile ("") between blocks and that seems to keep code before that before that, and code after that after that, which is good, but for (i...) { REG_A = i; REG_B = 1; } doesn''t fare so well, no matter what I do it mucks it up. If anyone knows how to prevent this (short of sticking certain functions in their own files and compiling with optimization/reordering off--a major headache) I''d be greatful if you could speak now. I''m not used working with GCC so I don''t know if there''s something I can do. ------------ - outRider -

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Look into these options:

-fdelayed-branch
If supported for the target machine, attempt to reorder instructions to exploit instruction slots available after delayed branch instructions.

-fschedule-insns
If supported for the target machine, attempt to reorder instructions to eliminate execution stalls due to required data being unavailable. This helps machines that have slow floating point or memory load instructions by allowing other instructions to be issued until the result of the load or floating point instruction is required.

-fschedule-insns2
Similar to -fschedule-insns, but requests an additional pass of instruction scheduling after register allocation has been done. This is especially useful on machines with a relatively small number of registers and where memory load instructions take more than one cycle.

note that -fno-foo-bar does the opposite of -ffoo-bar.


Don''t listen to me. I''ve had too much coffee.

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No cigar, they had no effect, -fdelayed-branch isn''t supported on this target anyway.

I was hoping there was a way to wrap certain blocks of code with some sort of #pragma or directive so the compiler wouldn''t mess with what was in there... guess not.

------------
- outRider -

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