Hello all,

Following program reports that 536 clockcycles have elapsed between the first rdtsc and the second rdtsc. This looks like a lot of cycles to me...

I ran the test on a 2.4 Ghz PIV under Suse Linux 8.0, gcc 3.3. Results are the same for O1 and O2. O0 returns 576 and O3 messes up... .

Intel 7.0 for Linux compiler reports 560 cycles under O0.
O1, O2 and O3 return garbage on Intel.
Am I doing something wrong here?

- Kurt

P.S. I tried some warming up by calling the rdtsc/cpuid sequence multiple times, but that didn''t make any difference... .
----
#define rdtscll(x)\
__asm__ __volatile__ ("rdtsc" : "=A" (x))
#define cpuid __asm__ __volatile__ (".byte 0x0f, 0xa2" : : : "eax", "ebx", "ecx", "edx"

int main()
{
unsigned cycles1, cycles2;
cycles1=0;
cycles2=0;

cpuid;
rdtscll(cycles1);
cpuid;
rdtscll(cycles2);

cout << cycles2-cycles1 << "\n";
}