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Hardware addition/subtraction

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I've been reading about hardware addition and subtraction (2's complement), and i can't seem to find anything about anything other then ripple adders. (you know one bit adders wired together?) What i would like to know is what are the designes for the newer types of adders/subtractors? (i know that they don't use this, but what do they use, and how? [google] Keywords would be nice, if anybody has any.) From, Nice coder

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This argument really belongs to hardware and electhronic computers, anyway
the basic 'adder' is black box with carry in, a,b, and carry out signal bits, its difficult to draw here but the digital circuit is pretty simple,
when you 'wire' more adders in a serial fashion you get ripple adders
there are many improvement on performance of adders, we have carry look ahead, carry skip, carry select, and the best in performance , tree adders, this special circuitry is physically located on the alu segment of a chip,
the alu does many things , basically it has 6 signal controls, about the subtraction you are right , the pc ( microprocesor ) before subtracting , transforms the lower value register in a c2 bit sequence, the procedure is pretty simple, you toggle of your bits in the register ( 0 turn 1 and 1 turn 0 ), thus the most significant bit is set to 1 ( this states the number is negative ), then , a binary sum of 1 is done on the toggled bit sequence, now you have the c2 of a number, the operation is performed on the alu and is pretty fast. Once the number is in c2 form , the numbers are added , just like a normal addition performed using a form of adder, and you get the result.
New design of adders ? , well we have studied many adders, the final adders
we have been shown was a hierarchic ( spelling???) adders, that's to say a tree adders.
Have a good day
ketek , aka v71 your daily source of digital electhronics :-))))))

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Are there any circuit diagrams with explanations out there for the more complex types? I've looked at the first few pages of the google search "Fast adder" and i ended up with a few papers, but nothing really good.

From,
Nice coder

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The argument is pretty wide, its difficult to draw circuitry here,
anyway the principle in advanced adders is that some operations on bit sequences may be performed in parallel and the resulting control bit(s) goes into a multiplexer , deciding wich part glue togheter , i know it may seems vapour , but again its difficult to explain without some prior knowledge, if you are serious about it i suggest you to look at some papers about digital electhornics and start from the beginning, learn how logic gates work ( and, or, xor, not ) and their inverted forms, look into boolean algebra, pay attention to DeMorgan formulas, they are widely used to simplyfing a circuit using xor gates, then look into adders, without knowing how logic gate sequential circuits work you wouldn't understand much of more advanced adders, anyway tree adders work most by avoiding recomputing the c0 bit sequence from a previous lower order bit, the c0 is the carry bit given by the formula
c0=ci and ( a xor b ) or ( a and b )
s= a xor b xor ci
this is all you need to compute a binary sum
ci is the carry in , a and b are the bits you want to sum , s is the sum
example 1+1 = 0 with c0 set to 1
the tree adders circuit looks much like a binary tree with connections going back to parent , the main idea is as follows :

pi= ai xor bi
gi = ai and bi
Si=pi xor ci
ci+1 = pi and ci +gi

so , first iteration is ( i will use + for or and * for and )
c1=g0+p0*c0
the second is
c2= g1+p1*c1 = g1+p1* ( g0+p0*c0 ) = g1+p1*g0+p1*p0*c0
the third is
c3=g2+p2*c2 =g2+p2*(g1+p1*g0+p1*p0*c0)=g2+p2*g1+p2*p1*g0+p2*p1*p0*c0
and so on until you reach 32 in this way you've compute a binary addition
of two 32 bit sequence integers

Have a good day

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there is "live" circuit diagram of Sklansky's adder in that clickster I posted.
It pretty well explain how fast adder works, and most of other adders are quite similar to Sklansky's adder.

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Quote:
Original post by ketek
The argument is pretty wide, its difficult to draw circuitry here,
anyway the principle in advanced adders is that some operations on bit sequences may be performed in parallel and the resulting control bit(s) goes into a multiplexer , deciding wich part glue togheter , i know it may seems vapour , but again its difficult to explain without some prior knowledge, if you are serious about it i suggest you to look at some papers about digital electhornics and start from the beginning, learn how logic gates work ( and, or, xor, not ) and their inverted forms, look into boolean algebra, pay attention to DeMorgan formulas, they are widely used to simplyfing a circuit using xor gates, then look into adders, without knowing how logic gate sequential circuits work you wouldn't understand much of more advanced adders, anyway tree adders work most by avoiding recomputing the c0 bit sequence from a previous lower order bit, the c0 is the carry bit given by the formula
c0=ci and ( a xor b ) or ( a and b )
s= a xor b xor ci
this is all you need to compute a binary sum
ci is the carry in , a and b are the bits you want to sum , s is the sum
example 1+1 = 0 with c0 set to 1
the tree adders circuit looks much like a binary tree with connections going back to parent , the main idea is as follows :

pi= ai xor bi
gi = ai and bi
Si=pi xor ci
ci+1 = pi and ci +gi

so , first iteration is ( i will use + for or and * for and )
c1=g0+p0*c0
the second is
c2= g1+p1*c1 = g1+p1* ( g0+p0*c0 ) = g1+p1*g0+p1*p0*c0
the third is
c3=g2+p2*c2 =g2+p2*(g1+p1*g0+p1*p0*c0)=g2+p2*g1+p2*p1*g0+p2*p1*p0*c0
and so on until you reach 32 in this way you've compute a binary addition
of two 32 bit sequence integers

Have a good day


Vapor?

i already know how logic gates work (and have used them a great deal. Working on a really nice design for a sortov vpu).


How did you get those formulas? (i'm interested in what it is what it is how it works, why it works, and having circuit diagrams (Webhosting + img tag?), so that i can build it (or my own derivitive which seems to be what i do.)).

From,
Nice coder

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