Assembly and CPUs
Author
I''m now learning X86 Assembly and I''d like to know how it differs (if at all) on other PC CPUs in the marketplace. Specificly, are the registers and implentation of Assembly the same whether I''m using a PIII a PIV or an Athlon/Thunderbird/Duron? It seems to me there must be some differences. I''ve seen programmers I work with use inline Assembly with great success in optimizing some routines, as well as when debugging code, and it''s a weapon I''d like to have in my arsenal. The problem is Assembly seems to be dead as far PC programming is concerned. Although I''ve found two very good books on X86 Assembly neither of them mention anything specificly about AMD and the new PIV, and I can''t locate any good resources on the net. Also, I''ve read that the NV20 will be programable and will have two vector units similar to the PS2. Does anyone have any good links or information about this?
This is straight off the top of my head, at the moment, so don''t quote me:
The Intel based processors (PIII, PIV and Athlon/Duron etc) have the same base assembly instructions plus or minus an instruction. That''s why they can all run in the Intel Windows environment. (If I recall correctly, I believe the GenuineIntel chips have some sort of timing instruction built into them, but since not everyone has an Intel chip, it''s avoided.) What separates them is 1) Their processor cores (the internal data pipelines) and 2) their additional instruction sets, like SIMD on Intel''s and 3DNow! on AMD''s chips. The registers are the same in order to maintain compatablility with Intel instruction based software. The main differences lie in how the architecture of the chips internal processing works. However, the outer level available to use as a programmer is the same. To find chips that are different, look for anything Sparc or any in the Apple G# processor flavor. They use different assembly instructions and have different registers. In addition, their internal constructions differ almost completely as well. I hope this helps. Don''t know if I can provide any more general information than that, but I can always try...
(If anyone wants to correct me, feel free. I''m a little fuzzy at the moment.. brain is fried from too much work.)
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How _not_ to give a presentation for work:
"Now, this part is really cool...uh, oh! I know why that happened. I was changing some of that code today and forgot to change this file! I''ll be right back." *running*.....
*running*
"What line was that?"
-=xelius=-
The Intel based processors (PIII, PIV and Athlon/Duron etc) have the same base assembly instructions plus or minus an instruction. That''s why they can all run in the Intel Windows environment. (If I recall correctly, I believe the GenuineIntel chips have some sort of timing instruction built into them, but since not everyone has an Intel chip, it''s avoided.) What separates them is 1) Their processor cores (the internal data pipelines) and 2) their additional instruction sets, like SIMD on Intel''s and 3DNow! on AMD''s chips. The registers are the same in order to maintain compatablility with Intel instruction based software. The main differences lie in how the architecture of the chips internal processing works. However, the outer level available to use as a programmer is the same. To find chips that are different, look for anything Sparc or any in the Apple G# processor flavor. They use different assembly instructions and have different registers. In addition, their internal constructions differ almost completely as well. I hope this helps. Don''t know if I can provide any more general information than that, but I can always try...
(If anyone wants to correct me, feel free. I''m a little fuzzy at the moment.. brain is fried from too much work.)
-----------------------------
How _not_ to give a presentation for work:
"Now, this part is really cool...uh, oh! I know why that happened. I was changing some of that code today and forgot to change this file! I''ll be right back." *running*.....
*running*
"What line was that?"
-=xelius=-
The PIII and PIV have a set of SSE registers, xmm0 - xmm7 that are missing in the PII and Athlon. The Athlon has something similar for 3DNow.
I don''t think that the Athlon introduced any big new features in the instruction set over the K6. The PIV has SSE2. I haven''t gotten around to looking into SSE2, but it probably just adds some new instructions.
Assembly language isn''t dead, but most application programmers need not use it anymore. Game programmers optimize with inline assembly, here and there in their code. OS programmers would use it more, and driver programmers use it all the time. There''s no question, though, that it''s much harder to learn now. 14 years ago when I learned it, the PC''s programming environment was completely open to experimentation because of DOS'' laissez-faire programming environment. Hardware access was easy, and you had complete control over the CPU...
If you want to know more about the NV20, I think that''s accessed through DirectX'' pixel and vertex shaders. Check out what MS has on pixel and vertex shaders at MSDN.
I don''t think that the Athlon introduced any big new features in the instruction set over the K6. The PIV has SSE2. I haven''t gotten around to looking into SSE2, but it probably just adds some new instructions.
Assembly language isn''t dead, but most application programmers need not use it anymore. Game programmers optimize with inline assembly, here and there in their code. OS programmers would use it more, and driver programmers use it all the time. There''s no question, though, that it''s much harder to learn now. 14 years ago when I learned it, the PC''s programming environment was completely open to experimentation because of DOS'' laissez-faire programming environment. Hardware access was easy, and you had complete control over the CPU...
If you want to know more about the NV20, I think that''s accessed through DirectX'' pixel and vertex shaders. Check out what MS has on pixel and vertex shaders at MSDN.
The PIII and PIV have a set of SSE registers, xmm0 - xmm7 that are missing in the PII and Athlon. The Athlon has something similar for 3DNow.
I don''t think that the Athlon introduced any big new features in the instruction set over the K6. The PIV has SSE2. I haven''t gotten around to looking into SSE2, but it probably just adds some new instructions.
Assembly language isn''t dead, but most application programmers need not use it anymore. Game programmers optimize with inline assembly, here and there in their code. OS programmers would use it more, and driver programmers use it all the time. There''s no question, though, that it''s much harder to learn now. 14 years ago when I learned it, the PC''s programming environment was completely open to experimentation because of DOS'' laissez-faire programming environment. Hardware access was easy, and you had complete control over the CPU...
If you want to know more about the NV20, I think that''s accessed through DirectX'' pixel and vertex shaders. Check out what MS has on pixel and vertex shaders at MSDN.
I don''t think that the Athlon introduced any big new features in the instruction set over the K6. The PIV has SSE2. I haven''t gotten around to looking into SSE2, but it probably just adds some new instructions.
Assembly language isn''t dead, but most application programmers need not use it anymore. Game programmers optimize with inline assembly, here and there in their code. OS programmers would use it more, and driver programmers use it all the time. There''s no question, though, that it''s much harder to learn now. 14 years ago when I learned it, the PC''s programming environment was completely open to experimentation because of DOS'' laissez-faire programming environment. Hardware access was easy, and you had complete control over the CPU...
If you want to know more about the NV20, I think that''s accessed through DirectX'' pixel and vertex shaders. Check out what MS has on pixel and vertex shaders at MSDN.
The athlon dosn''t contain any normally used registers the P3 dosn''t...3DNow all works in the MMX registers (MM0-MM7)...just much more efficently then the MMX instructions do (eg MMX can''t have parallel MMX instructions, although it should be able to proform MMX and single opcode aka simple instructions at the same time)
However all this is proberbly above your current level...so when you get done with understandig the basics, go on to learning tricks with them (ways to avoid MUL, pairing, shortcuts etc), then when it comes time to work on 3DNow MMX SSE SSE2, just go for what your current processor supports...eg MMX & SSE for a P3, add SSE2 for a P4, MMX & 3DNow for Athlon, MMX for earlier, detailed optimizations for pre MMX....
Oh, and if you can deal with SP (Single Precision) Floating Points, don''t bother too much with ageing, slow, and allowing FPU...SSE and 3DNow do a good enough job with it
Ah, and there aren''t any serious differences in intel/amd now (in terms of base instructions)
As for the learing....d/l MASM32, d/l Win32.hlp from borland.com, download intel dev manuals, and burn the books....souce code included in MASM and the detailed Win32, combined with a good reference is all u need
eh?
However all this is proberbly above your current level...so when you get done with understandig the basics, go on to learning tricks with them (ways to avoid MUL, pairing, shortcuts etc), then when it comes time to work on 3DNow MMX SSE SSE2, just go for what your current processor supports...eg MMX & SSE for a P3, add SSE2 for a P4, MMX & 3DNow for Athlon, MMX for earlier, detailed optimizations for pre MMX....
Oh, and if you can deal with SP (Single Precision) Floating Points, don''t bother too much with ageing, slow, and allowing FPU...SSE and 3DNow do a good enough job with it
Ah, and there aren''t any serious differences in intel/amd now (in terms of base instructions)
As for the learing....d/l MASM32, d/l Win32.hlp from borland.com, download intel dev manuals, and burn the books....souce code included in MASM and the detailed Win32, combined with a good reference is all u need
eh?
Addison Wesley had a PC System Architecture Series, but apparently it was dicontinued around 98. Amazon.com lists them as out of print. You can download the Intel manuals for free from their Literature Center. You can get similar information from AMD.
That was a good idea to download the doc and put it on a CD. I think I''ll do that.
That was a good idea to download the doc and put it on a CD. I think I''ll do that.
The timer mentioned earlier is RDTSC and exist in AMD too.
It''s even availbible on old Cyrix CPU:s.
It''s even availbible on old Cyrix CPU:s.
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