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Clunky IA32 code

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The normal ASM output from GCC looks a little ugly... unless there are constraints on register usage in the x86 that I'm not aware of? C source:
void acquire( PHEADER x ) {
   if ( x->refcount )
      x->refcount += 1;
}
ASM code:
acquire:
	pushl	%ebp
	movl	%esp, %ebp
	movl	8(%ebp), %eax	#  x
	cmpw	$0, (%eax)	#  <variable>.refcount
	je	.L3
	movl	8(%ebp), %edx	#  x
	movl	8(%ebp), %eax	#  x
	movzwl	(%eax), %eax	#  <variable>.refcount
	incl	%eax
	movw	%ax, (%edx)	#  <variable>.refcount
.L3:
	popl	%ebp
	ret
Could not the code be...
acquire:
  # Remove push and copy of ESP to EBP?
  # Load direct from parameter pointer?
	movl	8(%esp), %eax	#  x
	cmpw	$0, (%eax)	#  <variable>.refcount
	je	.L3
  # Unless CMPW modifies EAX?
  # Remove duplication of pointer into both EAX and EDX?
	incl	%eax
	movw	%ax, (%esp)	#  <variable>.refcount
.L3:
  # Remove pop to match removed push?
	ret
Or are there register usage constraints I'm not aware of? Because this code is identical with or without optimizations turned to full...

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It's generating code to save the old stack frame and set up a new one. Compile with the -fomit-frame-pointer option and you shouldn't see that. Also, this page has a lot of optimization related options, you can see which are automatically applied with the -O? options and which arent.

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Here we go. Much cleaner code, now.

acquire:
movl 4(%esp), %edx # x, x
movzwl (%edx), %eax # <variable>.refcount
testw %ax, %ax
je .L3
incl %eax
movw %ax, (%edx) # <variable>.refcount
.L3:
ret

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