Sign in to follow this  

Superscalar architecture

This topic is 3717 days old which is more than the 365 day threshold we allow for new replies. Please post a new topic.

If you intended to correct an error in the post then please contact us.

Recommended Posts

Hello. Since a few days i'm investigating some of my code using AMD CodeAnalyst. This tool give a very good overview about how the CPU pipelines are filled with instructions, but the problem is that i do not exactly understand the way instructions are splitted up ( loading, decoding, executing .... ) and flow down the pipeline. I have search over google to find some good documentations but i didn't find any good results. Do you know some good resources about Superscalar architecture, especialy Pentium and Athlon CPU, and how ASM instruction are splitted and what are the different step within those pipelines ... ?? Thanks a lot Clément

Share this post


Link to post
Share on other sites
Computer Organization and Design: The Hardware/Software Interface
Computer Architecture: A Quantitative Approach

Those two books, especially the second, will inform you of practically everything you need to know. They cover everything from Intel to POWER to MIPS to exotic VLIW processors. The examples start off with the simplified MIPS pipeline that's popular in academia and build on it.

If you just want info on Intel (and AMD) look at their documentation. If you have specific questions about something you've read and don't understand, ask.

Share this post


Link to post
Share on other sites

This topic is 3717 days old which is more than the 365 day threshold we allow for new replies. Please post a new topic.

If you intended to correct an error in the post then please contact us.

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now

Sign in to follow this