Hello. Since a few days i'm investigating some of my code using AMD CodeAnalyst. This tool give a very good overview about how the CPU pipelines are filled with instructions, but the problem is that i do not exactly understand the way instructions are splitted up ( loading, decoding, executing .... ) and flow down the pipeline. I have search over google to find some good documentations but i didn't find any good results. Do you know some good resources about Superscalar architecture, especialy Pentium and Athlon CPU, and how ASM instruction are splitted and what are the different step within those pipelines ... ?? Thanks a lot Clément

Computer Organization and Design: The Hardware/Software Interface
Computer Architecture: A Quantitative Approach

Those two books, especially the second, will inform you of practically everything you need to know. They cover everything from Intel to POWER to MIPS to exotic VLIW processors. The examples start off with the simplified MIPS pipeline that's popular in academia and build on it.

If you just want info on Intel (and AMD) look at their documentation. If you have specific questions about something you've read and don't understand, ask.

Agner Fog's papers are well worth having

http://www.agner.org/optimize/