Jump to content
  • Advertisement
Sign in to follow this  
obhi

Table for instruction latencies and reciprocal throughputs.

This topic is 3345 days old which is more than the 365 day threshold we allow for new replies. Please post a new topic.

If you intended to correct an error in the post then please contact us.

Recommended Posts

I've been searching for a while now for a table listing x86 instruction latency and reciprocal throughput. I came across the one by Agner Fog. Is there any such document available from intel's website. And besides does anybody have any other reference. It seems they are hard to find. I would really appreciate any help.

Share this post


Link to post
Share on other sites
Advertisement
I believe this is what you're looking for:

http://www.intel.com/products/processor/manuals/

Specifically, take a look at the "Optimization Reference Manual". There's an entire section devoted to listing instruction latencies and throughputs. You can download the .pdf's for free, or you can (like me) request a hard copy and Intel will send you the volumes by courier free of charge.

Share this post


Link to post
Share on other sites
Sign in to follow this  

  • Advertisement
×

Important Information

By using GameDev.net, you agree to our community Guidelines, Terms of Use, and Privacy Policy.

We are the game development community.

Whether you are an indie, hobbyist, AAA developer, or just trying to learn, GameDev.net is the place for you to learn, share, and connect with the games industry. Learn more About Us or sign up!

Sign me up!