In an effort to try to learn makefiles I wrote this

C = $(CXX)
CFLAGS = -g -Wall -Wextra -I$(SRC_DIR) -std=c++0x

SRC_DIR = src
BIN_DIR = bin
OBJ_DIR = obj

vpath %.cpp $(SRC_DIR)
vpath %.h $(SRC_DIR)
vpath %.o $(OBJ_DIR)

GPATH = src obj

SRC = main.cpp resources.cpp ui.cpp
OBJ = $(SRC:.cpp=.o)

.PHONY: clean all

all: $(OBJ)
    $C -o $(BIN_DIR)/exe $^


main.o: main.cpp defaults.h
    $C -c $< -o $(OBJ_DIR)/$@ $(CFLAGS)

resources.o: resources.cpp resources.h
    $C -c $< -o $(OBJ_DIR)/$@ $(CFLAGS)

ui.o: ui.cpp ui.h defaults.h
    $C -c $< -o $(OBJ_DIR)/$@ $(CFLAGS)


clean:
    rm -f $(OBJ_DIR)/*.o

When I run make and the obj directory is empty it compiles all the .cpp files and places them in $(OBJ_DIR)/$@ -> obj/file.o

However when it is time to execute the all target, g++ doesn't find .o files, because $^ contains only the files without the directory prepended

According to http://www.gnu.org/software/make/manual/make.html#Search-Algorithm this is the intended behavior (though not what I want at all) and it says I can modify it using the GPATH variable, which I set but seems to be ignored by make

Notes: if I run make again it finds the files in the obj directory, and since they don't need to be recompiled the path is preserved, so I can't even modify all to be

$C -o $(BIN_DIR)/exe $(addprefix $(OBJ_DIR)/$^)

A first invocation of make would build and link the files correctly, but the second time it would try to link obj/obj/file.o and fail

What am I doing wrong?

Using make when not all files are in the same dir is notoriously complicated (maybe switch to a less time consuming tool?).

It could help if in your link command under all: you change $^ to $(OBJ_DIR)/$^ so those files can be found.

That's what I thought at the beginning (see the note). In that case if any .o is not found it gets built in $(OBJ_DIR), then make links files in $(OBJ_DIR) and makes me happy. But every time that a file does NOT need to be rebuilt, the path where make finds it is remembered (so main.o becomes obj/main.o) when used both as target and dependency. Proceeding to the link command it becomes g++ -o bin/exe obj/obj/main.o

What really makes my head hurt is why make ignores GPATH. I wouldn't have any problem if only that worked

Why do you need you .o files in a separate folder? If you do "rm -f $(OBJ)" it will clean them all up anyway.

Well, I don't actually plan on cleaning the .o files very often, and I prefer not to keep them in the project root directory

Also, I dont know if you care, but I personally try to keep away from GNU extensions so that it works with different make tools (i.e BSD make).

I don't specifically need to write a file that works with other tools, but I suppose it would be better to learn how to do it. Which extensions did I use?

You also dont need this bit, you can just make a rule to generate .o files from .cpp (this is the main reason for make) An example of such a rule would be ".cpp.o:".

I've been wondering about this kind of rules. I've seen "$(OBJ): %.o: %.cpp" (here) but I can't understand how that would handle recompilation in the case a header file included by the source is modified

Thanks for the offer, but I've already seen quite a bit of examples. What I need is someone who would explain them

Make does have variables, so you can have the directory be a variable, so you only have to change it in one place.

I know. It just didn't seem a smart solution so I looked for something else