Shifting a signed integer to the right propagates the sign bit, which results in the correct result.

Shifting a negative signed integer to the right may or may not propagate the sign bit, the results of right shifting a negative are implementation defined in C++.

... and that, by the way, encroaches on the dark corners of C++ that you best avoid.

Worse yet is undefined-behavior, in which the compiler might do with values it knows at compile-time is sometimes different than what the CPU would do if left to its own devices with run-time values. For example, If you shift a 32bit unsigned value of 1 left 32 positions under VS2012 for x86 target, and both the '1' and the shift amount are known, the compiler's optimizer folds this away and the apparant result is 0. However, if one of them is a runtime value, the operation must be executed by the CPU, and on x86 (and x64, it happens) the result is 1.

To plug an article I wrote for the Visual C++ team blog that talks about this kind of thing from a perspective of undefined/implementation-defined behaviors that might bite you when moving from x86/x64 to ARM, see Hello ARM: Exploring Undefined, Unspecified, and Implementation-defined Behavior in C++.

Plenty can go wrong when programmers play fast and loose with the standard, and end up being too clever by half

[Edit] Slight pivot to be more precise, as SiCrane pointed out below.

You're right. I was being imprecise -- writing that article should have taught me better

• Undefined: Anything can happen, even different things under different circumstances.
• Implementation-defined: Whatever the compiler-vendor chooses to happen, happens. Its required to be documented and behave as documented, but might change in the future.
• Unspecified: Whatever the compiler-vendor chooses to happen, happens, but its not documented.

Anyhow, the point that should be taken home here is that sometimes things that appear to do one thing on the surface might not, in fact, do that according to the standard, and in general the "straight forward" method of doing something usually subject to fewer such dangers. Another point in the column of not trying to out-clever the compiler.

The one thing I can guarantee is that unless you're doing this in a deep inner loop and at least millions of times, you are not going to notice one bit of difference in terms of overall performance. This is just so much not worth worrying about.

^ This.

At this point, we've probably all spent more time on this thread than this kind of optimization will give back in the full life cycle of a program.

At best we're looking at a difference of one or two cycles, if there is a difference.

My crappy, outdated CPU has two cores that each run at 2.41 million cycles per second. I've spent a total of about 10 minutes poking around this thread from time to time. In terms of cycles on my crappy CPU we're looking at the neighborhood of 1,446,000,000.

How often does this code run?

The one thing I can guarantee is that unless you're doing this in a deep inner loop and at least millions of times, you are not going to notice one bit of difference in terms of overall performance. This is just so much not worth worrying about.

^ This.

At this point, we've probably all spent more time on this thread than this kind of optimization will give back in the full life cycle of a program.

At best we're looking at a difference of one or two cycles, if there is a difference.

My crappy, outdated CPU has two cores that each run at 2.41 million cycles per second. I've spent a total of about 10 minutes poking around this thread from time to time. In terms of cycles on my crappy CPU we're looking at the neighborhood of 1,446,000,000.

How often does this code run?

Something that is not being considered is that today's x86 instructions are pipelined.

If we take a look at my CPU's instruction latency list, most 'add' instructions have a latency of 0.33ns, but a throughput of 0.11ns

If we look instead at 'shl' & 'sar' instructions, they have a latency of 0.33ns but a throughput of 0.16ns.

This means in my CPU adding a register to itself is equally fast as bit shifting, and if there are many of those instructions to perform with no data dependencies (this is very important!), it's actually faster than bit shifting.

However other machines may have different latencies & throughput measurements, not to mention their out of order executions could be dumber/smarter, thus affecting the ability to reach throughput "ideal" performance

If we take a look at the mul & imul instructions, all of them are equal or above 1ns latency, and only a few have a throughput of 0.33ns while the rest are all above 1ns. In my machine it's clearly faster to use addition or bitshifting than multiplication.

My crappy, outdated CPU has two cores that each run at 2.41 million cycles per second. I've spent a total of about 10 minutes poking around this thread from time to time. In terms of cycles on my crappy CPU we're looking at the neighborhood of 1,446,000,000.

2.41 million cycles per second? Are you running a Z80?

[It's actually "billion"]

Ack. Billion, yes.

That makes it 1,446,000,000,000.

Meanwhile...

Something that is not being considered is that today's x86 instructions are pipelined.

If we take a look at my CPU's instruction latency list, most 'add' instructions have a latency of 0.33ns, but a throughput of 0.11ns
If we look instead at 'shl' & 'sar' instructions, they have a latency of 0.33ns but a throughput of 0.16ns.
This means in my CPU adding a register to itself is equally fast as bit shifting, and if there are many of those instructions to perform with no data dependencies (this is very important!), it's actually faster than bit shifting.
However other machines may have different latencies & throughput measurements, not to mention their out of order executions could be dumber/smarter, thus affecting the ability to reach throughput "ideal" performance

If we take a look at the mul & imul instructions, all of them are equal or above 1ns latency, and only a few have a throughput of 0.33ns while the rest are all above 1ns. In my machine it's clearly faster to use addition or bitshifting than multiplication.

There's not really a realistic scenario where you're going to end up with a mul or imul in this case. Even in debug mode VS optimizes *= 2 into a shl by 1. In release mode it registers the variable and does the add r32,r32, which is better by a difference of 0.05ns. 10 minutes is 600 billion ns, so you'd have to hit that instruction around 12 trillion times to get the 10 minutes back.