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Dauntless

What are Makefiles exactly?

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Okay, I just bought the Wrox book on beginning programming for linux, and in the first chapter, I''m already a little confused about Makefiles from a programming standpoint. What''s the difference between a Makefile and simple preprocessor directives? It seems like what it does is tell the compiler how to organize the sources code depending on dependencies. So whats the difference really?

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Original post by Dauntless

Okay, I just bought the Wrox book on beginning programming for linux, and in the first chapter, I''m already a little confused about Makefiles from a programming standpoint.



What''s the difference between a Makefile and simple preprocessor directives? It seems like what it does is tell the compiler how to organize the sources code depending on dependencies. So whats the difference really?






Makefiles are a very powefull way of compiling programs, resolving dependencies, and many other things.

Basically, a makefile contains dependencies, rules, and targets. To build (or "make") a target, it checks if files have changed from the last make, figures out how to build those files, and makes the target (usually an executable)

The most obvious benefit of using a makefile is that you don''t have to type huge gcc build strings to compile your program, and it saves compile time since it will only build things if they (or the files they are dependent upon) have changed. Secondly, they make it easier to port software on various systems using macros (i.e, the command to compile source on one system might be "gcc", and "cc" on another. ).You can also set defines from inside a makefile depending on which platform it is running on. Plus, it makes it easy to switch from a debug to a release build, install the software, clean out directories (like removing .o files), and a lot of nifty things.



Simple preproccesor directives only tell the compiler to include (or omit) certain files or segments of code. They don''t contain information on how to build an entire project, install documentation for a project, or anything else.

All in all, makefiles are pretty handy.

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quote:
Original post by Dauntless
What''s the difference between a Makefile and simple preprocessor directives? It seems like what it does is tell the compiler how to organize the sources code depending on dependencies. So whats the difference really?




Makefiles aren''t processed by the compiler. They''re processed by the ''make'' program. They figured out where the compiler needs to be run based on what has changed since your last compile, as well as a few other tricks.

These fill the same role as workspace/project files in MSVC, if you are familiar with programming under windows.

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Okay, I think I get it...

So the make program looks at a makefile, which is a lot like a script, and the makefile holds rules on dependencies and what to generate. From what I understand, it looks at any previously compiled .o files and sees if the new source code requires these .o files, and if the object file does not exist, then it compiles it.

However, I take it the make program does no linking wahtsoever?

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Original post by Dauntless
However, I take it the make program does no linking wahtsoever?

It does if you want it to (e.g. you specify linking commands in the Makefile).

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