Yea! I finally found the tutorial on how to use Xilinx's ISE program to turn VHDL into bitfiles that can run on the avnet Spartan 3A Evaluation Kit[1]. I followed the included tutorial that sets up a counter and sets the LEDs to display the top bits of the count, except I made some simple changes to make sure I understood everything. The only material change I made was to use a clock multiplier to increase the frequency from the 16 MHz oscillator to a much nicer 100 MHz. I'm so used to python and C++ that it took me a while to get used to the pascal-like syntax of VHDL, but aside from that (and the fact that the ISE software is not netbook friendly - way too much HD access and the UI doesn't fit on the 600-pixel-high screen), the process and results were pretty cool.
Ok, there is one more annoyance - that I can't find any drafts (or other legally free versions) of the 2008 VHDL standard. I like having the standard for a language I'm working in, but I don't quite like VHDL enough yet to spend nearly $300 as IEEE, ANSI, et al are asking for the pdf.

I've forgotten pretty much everything I knew about digital logic design, but I located my college text on the subject (one of the very few good books from my classes) and have been reading through it. I also picked up an interesting-looking book on processor design in a brick-and-mortar store, and then found out it was one of the best-rated books on the subject on amazon, which is nice to know. I need to start reading it sometime soon.

I think I've decided on my first big project to do on the FPGA in order to really familiarize myself with the hardware design and development process - Core War! I've already done a lot of software work with the game, so I'm pretty familiar with the instruction set and mechanics. I'm thinking I'll make a CPU that runs a game of Core Wars using the 'nanohill' rules - mainly because the board I'm using doesn't have SRAM so I need to make the whole game state fit into the BRAM in the FPGA. While almost any rule set would fit into the BRAM once, I'd really like to make a large array of Core Wars CPUs running simultaneously. Once I get that, I can load some known warriors from nano hills into the flash ram, and compete my creations against a full match (with all 142 starting positions against every opponent), which gives me a good way to benchmark a given warrior. Finally, with that capability, I should be able to make an evolver that can (by rough calculations) go through as many as a billion evaluations a day. If I'm lucky, I'll rule the nano hills a few days after I finish the project =-)


[1] It is the least expensive FPGA board I've ever seen. It's missing the fun things the more expensive kits have, like ports for VGA and audio, but for a mere $50, it's a great way to see if you're interested enough to spend more money on such hardware (and you can always use the pins it exposes to connect your own ports). It also comes with a a programmable-system-on-a-chip and a programmer for it, which is a nice bonus (especially considering that the board just for that PSoC is almost $200).