Compiling and running on armv7

Andreas Jonsson · 2013-11-30T23:30:30

It turns out that it was quite easy to add the support for native calling conventions with soft-float ABI, as this is identical to what Android uses. I just had to make a few adjustments to reuse the same code, and to automatically detect in the as_config.h whether compilation is for soft-float or hard-float by checking for the flag __SOFTFP__.

MarisA

129

Author

November 18, 2013 10:52 AM

I am get problems to run AngelScript on armv7-a (BEAGLEBONE BLACK) using AngelScript 2.28.

To compile library on board I use such flags "-Wall -fPIC -fno-strict-aliasing -mfloat-abi=hard -mfpu=neon -ffast-math -marm" and define _ARM_ and __linux__.

So when executing simple script functions everything goes OK, but when I trying do something with register object then program crash in library.


r = engine->RegisterObjectType("XmlDocument",sizeof(asXmlDocument), asOBJ_VALUE | asOBJ_POD |asOBJ_APP_CLASS_CDA); assert( r >= 0 );

r = engine->RegisterObjectBehaviour("XmlDocument", asBEHAVE_CONSTRUCT,  "void f()",asFUNCTION(ConstructXmlDocument), asCALL_CDECL_OBJFIRST); assert( r >= 0 );
r = engine->RegisterObjectBehaviour("XmlDocument", asBEHAVE_CONSTRUCT,  "void f(const XmlDocument &in)",asFUNCTION(ConstructXmlDocumentCopy), asCALL_CDECL_OBJFIRST); assert( r >= 0 );
r = engine->RegisterObjectBehaviour("XmlDocument", asBEHAVE_CONSTRUCT,  "void f(string &in)", asFUNCTION(ConstructXmlDocumentText), asCALL_CDECL_OBJFIRST); assert( r >= 0 );
r = engine->RegisterObjectBehaviour("XmlDocument", asBEHAVE_DESTRUCT,   "void f()", asFUNCTION(DestructXmlDocument), asCALL_CDECL_OBJLAST); assert( r >= 0 );

r = engine->RegisterObjectMethod("XmlDocument", "string getDocument()", asMETHOD(asXmlDocument,getDocument), asCALL_THISCALL); assert( r >= 0 );

and script :


 XmlDocument doc("<TELEGRAM></TELEGRAM>");
 string message=doc.getDocument();

when executing getDocument() before it reaches c++ code in that function program crash with such message : "terminate called after throwing an instance of 'std::bad_alloc' what(): std::bad_alloc".

The code 1:1 runs on other arm architecture ARM926J with soft float without any problems.

WitchLord

4,835

November 18, 2013 12:09 PM

Definitely sounds like a difference in the ABI. ARM seems to surpass even Intel in the number of different ABIs used. ;)

You shouldn't have to define _ARM_ or __linux__ manually. Doing so is likely to fool as_config.h into thinking it should use a different configuration than is correct for your platform.

Can you provide the pre-defined macros for your platform? It should be possible with something like this:

echo . | g++ -dM -E -Wall -fPIC -fno-strict-aliasing -mfloat-abi=hard -mfpu=neon -ffast-math -marm -

Hopefully there will be something in the pre-defined macros to identify your target platform and which ABI to use.

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MarisA

129

Author

November 18, 2013 02:56 PM

Oh I got my board macros, lot of them.


#define __DBL_MIN_EXP__ (-1021)
#define __HQ_FBIT__ 15
#define __UINT_LEAST16_MAX__ 65535
#define __ATOMIC_ACQUIRE 2
#define __SFRACT_IBIT__ 0
#define __FLT_MIN__ 1.1754943508222875e-38F
#define __UFRACT_MAX__ 0XFFFFP-16UR
#define __UINT_LEAST8_TYPE__ unsigned char
#define __DQ_FBIT__ 63
#define __INTMAX_C(c) c ## LL
#define __ULFRACT_FBIT__ 32
#define __SACCUM_EPSILON__ 0x1P-7HK
#define __CHAR_BIT__ 8
#define __USQ_IBIT__ 0
#define __UINT8_MAX__ 255
#define __ACCUM_FBIT__ 15
#define __WINT_MAX__ 4294967295U
#define __USFRACT_FBIT__ 8
#define __ORDER_LITTLE_ENDIAN__ 1234
#define __SIZE_MAX__ 4294967295U
#define __WCHAR_MAX__ 4294967295U
#define __LACCUM_IBIT__ 32
#define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1
#define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1
#define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1
#define __DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)
#define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 1
#define __GCC_ATOMIC_CHAR_LOCK_FREE 2
#define __FLT_EVAL_METHOD__ 0
#define __unix__ 1
#define __LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK
#define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 2
#define __FRACT_FBIT__ 15
#define __UINT_FAST64_MAX__ 18446744073709551615ULL
#define __SIG_ATOMIC_TYPE__ int
#define __UACCUM_FBIT__ 16
#define __DBL_MIN_10_EXP__ (-307)
#define __FINITE_MATH_ONLY__ 1
#define __ARMEL__ 1
#define __ARM_FEATURE_UNALIGNED 1
#define __LFRACT_IBIT__ 0
#define __GNUC_PATCHLEVEL__ 2
#define __LFRACT_MAX__ 0X7FFFFFFFP-31LR
#define __UINT_FAST8_MAX__ 255
#define __DEC64_MAX_EXP__ 385
#define __INT8_C(c) c
#define __UINT_LEAST64_MAX__ 18446744073709551615ULL
#define __SA_FBIT__ 15
#define __SHRT_MAX__ 32767
#define __LDBL_MAX__ 1.7976931348623157e+308L
#define __FRACT_MAX__ 0X7FFFP-15R
#define __UFRACT_FBIT__ 16
#define __UFRACT_MIN__ 0.0UR
#define __UINT_LEAST8_MAX__ 255
#define __GCC_ATOMIC_BOOL_LOCK_FREE 2
#define __UINTMAX_TYPE__ long long unsigned int
#define __LLFRACT_EPSILON__ 0x1P-63LLR
#define __linux 1
#define __DEC32_EPSILON__ 1E-6DF
#define __CHAR_UNSIGNED__ 1
#define __UINT32_MAX__ 4294967295U
#define __ULFRACT_MAX__ 0XFFFFFFFFP-32ULR
#define __TA_IBIT__ 64
#define __LDBL_MAX_EXP__ 1024
#define __WINT_MIN__ 0U
#define __linux__ 1
#define __ULLFRACT_MIN__ 0.0ULLR
#define __SCHAR_MAX__ 127
#define __WCHAR_MIN__ 0U
#define __INT64_C(c) c ## LL
#define __DBL_DIG__ 15
#define __GCC_ATOMIC_POINTER_LOCK_FREE 2
#define __LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)
#define __SIZEOF_INT__ 4
#define __SIZEOF_POINTER__ 4
#define __USACCUM_IBIT__ 8
#define __USER_LABEL_PREFIX__
#define __STDC_HOSTED__ 1
#define __LDBL_HAS_INFINITY__ 1
#define __LFRACT_MIN__ (-0.5LR-0.5LR)
#define __HA_IBIT__ 8
#define __TQ_IBIT__ 0
#define __FLT_EPSILON__ 1.1920928955078125e-7F
#define __APCS_32__ 1
#define __USFRACT_IBIT__ 0
#define __LDBL_MIN__ 2.2250738585072014e-308L
#define __FRACT_MIN__ (-0.5R-0.5R)
#define __DEC32_MAX__ 9.999999E96DF
#define __DA_IBIT__ 32
#define __INT32_MAX__ 2147483647
#define __UQQ_FBIT__ 8
#define __SIZEOF_LONG__ 4
#define __UACCUM_MAX__ 0XFFFFFFFFP-16UK
#define __UINT16_C(c) c
#define __DECIMAL_DIG__ 17
#define __LFRACT_EPSILON__ 0x1P-31LR
#define __ULFRACT_MIN__ 0.0ULR
#define __gnu_linux__ 1
#define __ARM_PCS_VFP 1
#define __LDBL_HAS_QUIET_NAN__ 1
#define __ULACCUM_IBIT__ 32
#define __UACCUM_EPSILON__ 0x1P-16UK
#define __GNUC__ 4
#define __ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK
#define __HQ_IBIT__ 0
#define __FLT_HAS_DENORM__ 1
#define __SIZEOF_LONG_DOUBLE__ 8
#define __BIGGEST_ALIGNMENT__ 8
#define __DQ_IBIT__ 0
#define __DBL_MAX__ ((double)1.7976931348623157e+308L)
#define __ULFRACT_IBIT__ 0
#define __INT_FAST32_MAX__ 2147483647
#define __DBL_HAS_INFINITY__ 1
#define __ACCUM_IBIT__ 16
#define __DEC32_MIN_EXP__ (-94)
#define __THUMB_INTERWORK__ 1
#define __LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK
#define __INT_FAST16_TYPE__ int
#define __LDBL_HAS_DENORM__ 1
#define __DEC128_MAX__ 9.999999999999999999999999999999999E6144DL
#define __INT_LEAST32_MAX__ 2147483647
#define __DEC32_MIN__ 1E-95DF
#define __ACCUM_MAX__ 0X7FFFFFFFP-15K
#define __DBL_MAX_EXP__ 1024
#define __USACCUM_EPSILON__ 0x1P-8UHK
#define __DEC128_EPSILON__ 1E-33DL
#define __SFRACT_MAX__ 0X7FP-7HR
#define __FRACT_IBIT__ 0
#define __PTRDIFF_MAX__ 2147483647
#define __UACCUM_MIN__ 0.0UK
#define __UACCUM_IBIT__ 16
#define __LONG_LONG_MAX__ 9223372036854775807LL
#define __SIZEOF_SIZE_T__ 4
#define __ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK
#define __SIZEOF_WINT_T__ 4
#define __SA_IBIT__ 16
#define __ULLACCUM_MIN__ 0.0ULLK
#define __GXX_ABI_VERSION 1002
#define __UTA_FBIT__ 64
#define __FLT_MIN_EXP__ (-125)
#define __USFRACT_MAX__ 0XFFP-8UHR
#define __UFRACT_IBIT__ 0
#define __INT_FAST64_TYPE__ long long int
#define __DBL_MIN__ ((double)2.2250738585072014e-308L)
#define __LACCUM_MIN__ (-0X1P31LK-0X1P31LK)
#define __ULLACCUM_FBIT__ 32
#define __GXX_TYPEINFO_EQUALITY_INLINE 0
#define __ULLFRACT_EPSILON__ 0x1P-64ULLR
#define __DEC128_MIN__ 1E-6143DL
#define __REGISTER_PREFIX__
#define __UINT16_MAX__ 65535
#define __DBL_HAS_DENORM__ 1
#define __ACCUM_MIN__ (-0X1P15K-0X1P15K)
#define __SQ_IBIT__ 0
#define __UINT8_TYPE__ unsigned char
#define __UHA_FBIT__ 8
#define __NO_INLINE__ 1
#define __SFRACT_MIN__ (-0.5HR-0.5HR)
#define __UTQ_FBIT__ 128
#define __FLT_MANT_DIG__ 24
#define __VERSION__ "4.7.2"
#define __UINT64_C(c) c ## ULL
#define __ULLFRACT_FBIT__ 64
#define __FRACT_EPSILON__ 0x1P-15R
#define __ULACCUM_MIN__ 0.0ULK
#define __UDA_FBIT__ 32
#define __LLACCUM_EPSILON__ 0x1P-31LLK
#define __GCC_ATOMIC_INT_LOCK_FREE 2
#define __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__
#define __USFRACT_MIN__ 0.0UHR
#define __UQQ_IBIT__ 0
#define __ARM_NEON__ 1
#define __INT32_C(c) c
#define __DEC64_EPSILON__ 1E-15DD
#define __ORDER_PDP_ENDIAN__ 3412
#define __DEC128_MIN_EXP__ (-6142)
#define __UHQ_FBIT__ 16
#define __LLACCUM_FBIT__ 31
#define __INT_FAST32_TYPE__ int
#define __UINT_LEAST16_TYPE__ short unsigned int
#define unix 1
#define __INT16_MAX__ 32767
#define __SIZE_TYPE__ unsigned int
#define __UINT64_MAX__ 18446744073709551615ULL
#define __UDQ_FBIT__ 64
#define __INT8_TYPE__ signed char
#define __ELF__ 1
#define __ULFRACT_EPSILON__ 0x1P-32ULR
#define __LLFRACT_FBIT__ 63
#define __FLT_RADIX__ 2
#define __INT_LEAST16_TYPE__ short int
#define __LDBL_EPSILON__ 2.2204460492503131e-16L
#define __UINTMAX_C(c) c ## ULL
#define __SACCUM_MAX__ 0X7FFFP-7HK
#define __SIG_ATOMIC_MAX__ 2147483647
#define __GCC_ATOMIC_WCHAR_T_LOCK_FREE 2
#define __VFP_FP__ 1
#define __SIZEOF_PTRDIFF_T__ 4
#define __LACCUM_EPSILON__ 0x1P-31LK
#define __DEC32_SUBNORMAL_MIN__ 0.000001E-95DF
#define __INT_FAST16_MAX__ 2147483647
#define __UINT_FAST32_MAX__ 4294967295U
#define __UINT_LEAST64_TYPE__ long long unsigned int
#define __USACCUM_MAX__ 0XFFFFP-8UHK
#define __SFRACT_EPSILON__ 0x1P-7HR
#define __FLT_HAS_QUIET_NAN__ 1
#define __FLT_MAX_10_EXP__ 38
#define __LONG_MAX__ 2147483647L
#define __DEC128_SUBNORMAL_MIN__ 0.000000000000000000000000000000001E-6143DL
#define __FLT_HAS_INFINITY__ 1
#define __unix 1
#define __USA_FBIT__ 16
#define __UINT_FAST16_TYPE__ unsigned int
#define __DEC64_MAX__ 9.999999999999999E384DD
#define __CHAR16_TYPE__ short unsigned int
#define __PRAGMA_REDEFINE_EXTNAME 1
#define __INT_LEAST16_MAX__ 32767
#define __DEC64_MANT_DIG__ 16
#define __INT64_MAX__ 9223372036854775807LL
#define __UINT_LEAST32_MAX__ 4294967295U
#define __SACCUM_FBIT__ 7
#define __GCC_ATOMIC_LONG_LOCK_FREE 2
#define __FAST_MATH__ 1
#define __INT_LEAST64_TYPE__ long long int
#define __INT16_TYPE__ short int
#define __INT_LEAST8_TYPE__ signed char
#define __SQ_FBIT__ 31
#define __DEC32_MAX_EXP__ 97
#define __INT_FAST8_MAX__ 127
#define __INTPTR_MAX__ 2147483647
#define __QQ_FBIT__ 7
#define linux 1
#define __UTA_IBIT__ 64
#define __LDBL_MANT_DIG__ 53
#define __SFRACT_FBIT__ 7
#define __SACCUM_MIN__ (-0X1P7HK-0X1P7HK)
#define __DBL_HAS_QUIET_NAN__ 1
#define __SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)
#define __INTPTR_TYPE__ int
#define __UINT16_TYPE__ short unsigned int
#define __WCHAR_TYPE__ unsigned int
#define __SIZEOF_FLOAT__ 4
#define __USQ_FBIT__ 32
#define __pic__ 2
#define __UINTPTR_MAX__ 4294967295U
#define __DEC64_MIN_EXP__ (-382)
#define __ULLACCUM_IBIT__ 32
#define __INT_FAST64_MAX__ 9223372036854775807LL
#define __GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1
#define __FLT_DIG__ 6
#define __UINT_FAST64_TYPE__ long long unsigned int
#define __INT_MAX__ 2147483647
#define __LACCUM_FBIT__ 31
#define __USACCUM_MIN__ 0.0UHK
#define __UHA_IBIT__ 8
#define __INT64_TYPE__ long long int
#define __FLT_MAX_EXP__ 128
#define __UTQ_IBIT__ 0
#define __DBL_MANT_DIG__ 53
#define __INT_LEAST64_MAX__ 9223372036854775807LL
#define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 2
#define __DEC64_MIN__ 1E-383DD
#define __WINT_TYPE__ unsigned int
#define __UINT_LEAST32_TYPE__ unsigned int
#define __SIZEOF_SHORT__ 2
#define __ULLFRACT_IBIT__ 0
#define __LDBL_MIN_EXP__ (-1021)
#define __arm__ 1
#define __UDA_IBIT__ 32
#define __INT_LEAST8_MAX__ 127
#define __LFRACT_FBIT__ 31
#define __ARM_ARCH_7A__ 1
#define __LDBL_MAX_10_EXP__ 308
#define __ATOMIC_RELAXED 0
#define __DBL_EPSILON__ ((double)2.2204460492503131e-16L)
#define __UINT8_C(c) c
#define __INT_LEAST32_TYPE__ int
#define __SIZEOF_WCHAR_T__ 4
#define __UINT64_TYPE__ long long unsigned int
#define __LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLR
#define __TQ_FBIT__ 127
#define __INT_FAST8_TYPE__ signed char
#define __ULLACCUM_EPSILON__ 0x1P-32ULLK
#define __UHQ_IBIT__ 0
#define __LLACCUM_IBIT__ 32
#define __DBL_DECIMAL_DIG__ 17
#define __DEC_EVAL_METHOD__ 2
#define __TA_FBIT__ 63
#define __UDQ_IBIT__ 0
#define __ORDER_BIG_ENDIAN__ 4321
#define __ACCUM_EPSILON__ 0x1P-15K
#define __UINT32_C(c) c ## U
#define __INTMAX_MAX__ 9223372036854775807LL
#define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__
#define __FLT_DENORM_MIN__ 1.4012984643248171e-45F
#define __LLFRACT_IBIT__ 0
#define __INT8_MAX__ 127
#define __PIC__ 2
#define __UINT_FAST32_TYPE__ unsigned int
#define __CHAR32_TYPE__ unsigned int
#define __FLT_MAX__ 3.4028234663852886e+38F
#define __USACCUM_FBIT__ 8
#define __INT32_TYPE__ int
#define __SIZEOF_DOUBLE__ 8
#define __FLT_MIN_10_EXP__ (-37)
#define __UFRACT_EPSILON__ 0x1P-16UR
#define __INTMAX_TYPE__ long long int
#define __DEC128_MAX_EXP__ 6145
#define __ATOMIC_CONSUME 1
#define __GNUC_MINOR__ 7
#define __UINTMAX_MAX__ 18446744073709551615ULL
#define __DEC32_MANT_DIG__ 7
#define __HA_FBIT__ 7
#define __DBL_MAX_10_EXP__ 308
#define __LDBL_DENORM_MIN__ 4.9406564584124654e-324L
#define __INT16_C(c) c
#define __STDC__ 1
#define __PTRDIFF_TYPE__ int
#define __LLFRACT_MIN__ (-0.5LLR-0.5LLR)
#define __ATOMIC_SEQ_CST 5
#define __DA_FBIT__ 31
#define __UINT32_TYPE__ unsigned int
#define __UINTPTR_TYPE__ unsigned int
#define __USA_IBIT__ 16
#define __DEC64_SUBNORMAL_MIN__ 0.000000000000001E-383DD
#define __ARM_EABI__ 1
#define __DEC128_MANT_DIG__ 34
#define __LDBL_MIN_10_EXP__ (-307)
#define __SIZEOF_LONG_LONG__ 8
#define __ULACCUM_EPSILON__ 0x1P-32ULK
#define __SACCUM_IBIT__ 8
#define __GCC_ATOMIC_LLONG_LOCK_FREE 2
#define __LDBL_DIG__ 15
#define __FLT_DECIMAL_DIG__ 9
#define __UINT_FAST16_MAX__ 4294967295U
#define __GNUC_GNU_INLINE__ 1
#define __GCC_ATOMIC_SHORT_LOCK_FREE 2
#define __ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR
#define __UINT_FAST8_TYPE__ unsigned char
#define __USFRACT_EPSILON__ 0x1P-8UHR
#define __ULACCUM_FBIT__ 32
#define __ARM_FEATURE_DSP 1
#define __QQ_IBIT__ 0
#define __ATOMIC_ACQ_REL 4
#define __ATOMIC_RELEASE 3

WitchLord

4,835

November 18, 2013 05:37 PM

Thanks. The following are the relevant macros:


// Compiler version
#define __GNUC__ 4
#define __GNUC_MINOR__ 7
#define __GNUC_PATCHLEVEL__ 2
 
// Target OS
#define linux 1
#define __linux 1
#define __linux__ 1
#define unix 1
#define __unix 1
#define __gnu_linux__ 1
 
// Target CPU and ABI
#define __arm__ 1
#define __ARMEL__ 1
#define __ARM_FEATURE_UNALIGNED 1
#define __APCS_32__ 1
#define __ARM_PCS_VFP 1
#define __THUMB_INTERWORK__ 1
#define __GXX_ABI_VERSION 1002
#define __ARM_NEON__ 1
#define __ELF__ 1
#define __VFP_FP__ 1
#define __FAST_MATH__ 1
#define __ARM_ARCH_7A__ 1
#define __ARM_EABI__ 1
 
// Extras
#define __SIZEOF_POINTER__ 4
#define __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__
#define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__

With this the as_config.h will set up the following (I've simplified the code to remove the unrelevant parts):

// GNU C (and MinGW or Cygwin on Windows)
// Use the following command to determine predefined macros: echo . | mingw32-g++ -dM -E -
#if (defined(__GNUC__) && !defined(__SNC__)) || defined(EPPC) || defined(__CYGWIN__) // JWC -- use this instead for Wii
 #define GNU_STYLE_VIRTUAL_METHOD
 #define MULTI_BASE_OFFSET(x) (*((asDWORD*)(&x)+1))
 #define asVSNPRINTF(a, b, c, d) vsnprintf(a, b, c, d)
 #define CALLEE_POPS_HIDDEN_RETURN_POINTER
 #define COMPLEX_OBJS_PASSED_BY_REF
 #define COMPLEX_MASK (asOBJ_APP_CLASS_DESTRUCTOR)
 #define COMPLEX_RETURN_MASK (asOBJ_APP_CLASS_DESTRUCTOR)
 #define AS_NO_MEMORY_H
 #define AS_SIZEOF_BOOL 1
 #define STDCALL __attribute__((stdcall))
 #define ASM_AT_N_T
 // Linux
 #if defined(__linux__) && !defined(ANDROID) && !defined(__ANDROID__)
  #undef COMPLEX_MASK
  #define COMPLEX_MASK (asOBJ_APP_CLASS_DESTRUCTOR | asOBJ_APP_CLASS_COPY_CONSTRUCTOR)
  #undef COMPLEX_RETURN_MASK
  #define COMPLEX_RETURN_MASK (asOBJ_APP_CLASS_DESTRUCTOR | asOBJ_APP_CLASS_COPY_CONSTRUCTOR)
  #if defined(__ARMEL__) || defined(__arm__)
   #define AS_ARM
   #define AS_NO_ATOMIC
   #define CDECL_RETURN_SIMPLE_IN_MEMORY
   #define STDCALL_RETURN_SIMPLE_IN_MEMORY
   #define THISCALL_RETURN_SIMPLE_IN_MEMORY
   #undef THISCALL_RETURN_SIMPLE_IN_MEMORY_MIN_SIZE
   #undef CDECL_RETURN_SIMPLE_IN_MEMORY_MIN_SIZE
   #undef STDCALL_RETURN_SIMPLE_IN_MEMORY_MIN_SIZE
   #define THISCALL_RETURN_SIMPLE_IN_MEMORY_MIN_SIZE 2
   #define CDECL_RETURN_SIMPLE_IN_MEMORY_MIN_SIZE 2
   #define STDCALL_RETURN_SIMPLE_IN_MEMORY_MIN_SIZE 2
  #endif
  #define AS_LINUX
  #define AS_POSIX_THREADS
  #if !( ( (__GNUC__ == 4) && (__GNUC_MINOR__ >= 1) || __GNUC__ > 4) )
   // Only with GCC 4.1 was the atomic instructions available
   #define AS_NO_ATOMIC
  #endif
 #endif
 #define UNREACHABLE_RETURN
#endif

?

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WitchLord

4,835

November 18, 2013 05:59 PM

The hard part now is to figure out what needs to be changed in as_callfunc_arm.cpp, as_callfunc_arm_gcc.S, and possibly also as_callfunc.cpp. For this I'll need you to do a little investigative work on your own as I have no ARM development environment myself, much less one with the exact same specifications as yours.

I would start by disassembling a couple of simple functions compiled by the C++ compiler. You can use the command line arg -S (or is it -s?) to have g++ write the assembly instructions to an intermediate file. Then check how the C++ compiler expects to receive the function arguments (e.g. does it read them from the stack, or does it use the values directly from the registers) and return the result (complex objects like the string type are usually returned in memory, where the function receives a hidden pointer to that memory block).

Usually the differences between the ABIs are quite small, so it is usually mostly a matter of identifying what they are and then adapt the code in as_callfunc_arm.cpp accordingly (taking care to use the appropriate compiler macros to identify the correct target platform).

Of course, if you do not have the time or interest of doing this investigative work, then you can just turn on the portability mode and use the generic calling convention instead.

Regards,

Andreas

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MarisA

129

Author

November 19, 2013 10:04 AM

My assemble skills are quit low, but I found previous thread http://www.gamedev.net/topic/634187-angelscript-on-raspberry-pi . From that i disassemble such code :


struct Int4
{
    int a;
};
struct Int8
{
    int a,b;
};
struct Int12
{
    int a,b,c;
};
struct Float20
{
    float a,b,c,d,e;
};

Int4 test4(void)
{
    Int4 p={1};
    return p;
}
Int8 test8(void)
{
    Int8 p={1,2};
    return p;
}
Int12 test12(void)
{
    Int12 p={1,2,3};
    return p;
}
Float20 test20(void)
{
    Float20 p={1.1f, 2.2f, 3.3f, 4.4f, 5.5f};
    return p;
}


int main() {

		Int4 i4 = test4();
	    Int8 i8 = test8();
	    Int12 i12 = test12();
	    Float20 f20= test20();
	    std::cout << "Valor: " << i4.a << ".\n";
	    std::cout << "Valor: " << i8.a << ".\n";
	    std::cout << "Valor: " << i8.b << ".\n";
	    std::cout << "Valor: " << i12.a << ".\n";
	    std::cout << "Valor: " << i12.b << ".\n";
	    std::cout << "Valor: " << i12.c << ".\n";
	    std::cout << "Valor: " << f20.a << ".\n";
	    std::cout << "Valor: " << f20.b << ".\n";
	    std::cout << "Valor: " << f20.c << ".\n";
	    std::cout << "Valor: " << f20.d << ".\n";
	    std::cout << "Valor: " << f20.e << ".\n";
}


          test4():
0005fa00:   push {r7}
0005fa02:   sub sp, #12
0005fa04:   add r7, sp, #0
 65           Int4 p={1};
0005fa06:   movs r3, #1
0005fa08:   str r3, [r7, #4]
 66           return p;
0005fa0a:   ldr r3, [r7, #4]
 67       }
0005fa0c:   mov r0, r3
0005fa0e:   add.w r7, r7, #12
0005fa12:   mov sp, r7
0005fa14:   pop {r7}
0005fa16:   bx lr
 69       {
          test8():
0005fa18:   push {r7}
0005fa1a:   sub sp, #12
0005fa1c:   add r7, sp, #0
0005fa1e:   str r0, [r7, #4]
 70           Int8 p={1,2};
0005fa20:   ldr r2, [r7, #4]
0005fa22:   movw r3, #11664 ; 0x2d90
0005fa26:   movt r3, #22
0005fa2a:   ldmia.w r3, {r0, r1}
0005fa2e:   stmia.w r2, {r0, r1}
 71           return p;
0005fa32:   nop 
 72       }
0005fa34:   ldr r0, [r7, #4]
0005fa36:   add.w r7, r7, #12
0005fa3a:   mov sp, r7
0005fa3c:   pop {r7}
0005fa3e:   bx lr
 74       {
          test12():
0005fa40:   push {r4, r7}
0005fa42:   sub sp, #8
0005fa44:   add r7, sp, #0
0005fa46:   str r0, [r7, #4]
 75           Int12 p={1,2,3};
0005fa48:   ldr r2, [r7, #4]
0005fa4a:   movw r3, #11672 ; 0x2d98
0005fa4e:   movt r3, #22
0005fa52:   mov r4, r2
0005fa54:   ldmia.w r3, {r0, r1, r2}
0005fa58:   stmia.w r4, {r0, r1, r2}
 76           return p;
0005fa5c:   nop 
 77       }
0005fa5e:   ldr r0, [r7, #4]
0005fa60:   add.w r7, r7, #8
0005fa64:   mov sp, r7
0005fa66:   pop {r4, r7}
0005fa68:   bx lr
0005fa6a:   nop 
 79       {
          test20():
0005fa6c:   push {r4, r5, r7}
0005fa6e:   sub sp, #12
0005fa70:   add r7, sp, #0
0005fa72:   str r0, [r7, #4]
 80           Float20 p={1.1f, 2.2f, 3.3f, 4.4f, 5.5f};
0005fa74:   ldr r2, [r7, #4]
0005fa76:   movw r3, #11684 ; 0x2da4
0005fa7a:   movt r3, #22
0005fa7e:   mov r4, r2
0005fa80:   mov r5, r3
0005fa82:   ldmia r5!, {r0, r1, r2, r3}
0005fa84:   stmia r4!, {r0, r1, r2, r3}
0005fa86:   ldr r3, [r5, #0]
0005fa88:   str r3, [r4, #0]
 81           return p;
0005fa8a:   nop 
 82       }
0005fa8c:   ldr r0, [r7, #4]
0005fa8e:   add.w r7, r7, #12
0005fa92:   mov sp, r7
0005fa94:   pop {r4, r5, r7}
0005fa96:   bx lr
 85       int main() {
          main():
0005fa98:   push {r7, lr}
0005fa9a:   sub sp, #48     ; 0x30
0005fa9c:   add r7, sp, #0
 87       	Int4 i4 = test4();
0005fa9e:   bl 0x5fa00 <test4()>
0005faa2:   mov r3, r0
0005faa4:   str r3, [r7, #4]
 88       	    Int8 i8 = test8();
0005faa6:   add.w r3, r7, #8
0005faaa:   mov r0, r3
0005faac:   bl 0x5fa18 <test8()>
 89       	    Int12 i12 = test12();
0005fab0:   add.w r3, r7, #16
0005fab4:   mov r0, r3
0005fab6:   bl 0x5fa40 <test12()>
 90       	    Float20 f20= test20();
0005faba:   add.w r3, r7, #28
0005fabe:   mov r0, r3
0005fac0:   bl 0x5fa6c <test20()>
 91       	    std::cout << "Valor: " << i4.a << ".\n";
0005fac4:   movw r0, #58880 ; 0xe600
0005fac8:   movt r0, #28
0005facc:   movw r1, #11704 ; 0x2db8
0005fad0:   movt r1, #22
0005fad4:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fad8:   mov r3, r0
0005fada:   mov r2, r3
0005fadc:   ldr r3, [r7, #4]
0005fade:   mov r0, r2
0005fae0:   mov r1, r3
0005fae2:   blx 0xd6a8 <_ZNSolsEi>
0005fae6:   mov r3, r0
0005fae8:   mov r0, r3
0005faea:   movw r1, #11712 ; 0x2dc0
0005faee:   movt r1, #22
0005faf2:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
 92       	    std::cout << "Valor: " << i8.a << ".\n";
0005faf6:   movw r0, #58880 ; 0xe600
0005fafa:   movt r0, #28
0005fafe:   movw r1, #11704 ; 0x2db8
0005fb02:   movt r1, #22
0005fb06:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fb0a:   mov r3, r0
0005fb0c:   mov r2, r3
0005fb0e:   ldr r3, [r7, #8]
0005fb10:   mov r0, r2
0005fb12:   mov r1, r3
0005fb14:   blx 0xd6a8 <_ZNSolsEi>
0005fb18:   mov r3, r0
0005fb1a:   mov r0, r3
0005fb1c:   movw r1, #11712 ; 0x2dc0
0005fb20:   movt r1, #22
0005fb24:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
 93       	    std::cout << "Valor: " << i8.b << ".\n";
0005fb28:   movw r0, #58880 ; 0xe600
0005fb2c:   movt r0, #28
0005fb30:   movw r1, #11704 ; 0x2db8
0005fb34:   movt r1, #22
0005fb38:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fb3c:   mov r3, r0
0005fb3e:   mov r2, r3
0005fb40:   ldr r3, [r7, #12]
0005fb42:   mov r0, r2
0005fb44:   mov r1, r3
0005fb46:   blx 0xd6a8 <_ZNSolsEi>
0005fb4a:   mov r3, r0
0005fb4c:   mov r0, r3
0005fb4e:   movw r1, #11712 ; 0x2dc0
0005fb52:   movt r1, #22
0005fb56:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
 94       	    std::cout << "Valor: " << i12.a << ".\n";
0005fb5a:   movw r0, #58880 ; 0xe600
0005fb5e:   movt r0, #28
0005fb62:   movw r1, #11704 ; 0x2db8
0005fb66:   movt r1, #22
0005fb6a:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fb6e:   mov r3, r0
0005fb70:   mov r2, r3
0005fb72:   ldr r3, [r7, #16]
0005fb74:   mov r0, r2
0005fb76:   mov r1, r3
0005fb78:   blx 0xd6a8 <_ZNSolsEi>
0005fb7c:   mov r3, r0
0005fb7e:   mov r0, r3
0005fb80:   movw r1, #11712 ; 0x2dc0
0005fb84:   movt r1, #22
0005fb88:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
 95       	    std::cout << "Valor: " << i12.b << ".\n";
0005fb8c:   movw r0, #58880 ; 0xe600
0005fb90:   movt r0, #28
0005fb94:   movw r1, #11704 ; 0x2db8
0005fb98:   movt r1, #22
0005fb9c:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fba0:   mov r3, r0
0005fba2:   mov r2, r3
0005fba4:   ldr r3, [r7, #20]
0005fba6:   mov r0, r2
0005fba8:   mov r1, r3
0005fbaa:   blx 0xd6a8 <_ZNSolsEi>
0005fbae:   mov r3, r0
0005fbb0:   mov r0, r3
0005fbb2:   movw r1, #11712 ; 0x2dc0
0005fbb6:   movt r1, #22
0005fbba:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
 96       	    std::cout << "Valor: " << i12.c << ".\n";
0005fbbe:   movw r0, #58880 ; 0xe600
0005fbc2:   movt r0, #28
0005fbc6:   movw r1, #11704 ; 0x2db8
0005fbca:   movt r1, #22
0005fbce:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fbd2:   mov r3, r0
0005fbd4:   mov r2, r3
0005fbd6:   ldr r3, [r7, #24]
0005fbd8:   mov r0, r2
0005fbda:   mov r1, r3
0005fbdc:   blx 0xd6a8 <_ZNSolsEi>
0005fbe0:   mov r3, r0
0005fbe2:   mov r0, r3
0005fbe4:   movw r1, #11712 ; 0x2dc0
0005fbe8:   movt r1, #22
0005fbec:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
 97       	    std::cout << "Valor: " << f20.a << ".\n";
0005fbf0:   movw r0, #58880 ; 0xe600
0005fbf4:   movt r0, #28
0005fbf8:   movw r1, #11704 ; 0x2db8
0005fbfc:   movt r1, #22
0005fc00:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fc04:   mov r3, r0
0005fc06:   vldr s15, [r7, #28]
0005fc0a:   mov r0, r3
0005fc0c:   vmov.f32 s0, s15
0005fc10:   blx 0xcfac <_ZNSolsEf>
0005fc14:   mov r3, r0
0005fc16:   mov r0, r3
0005fc18:   movw r1, #11712 ; 0x2dc0
0005fc1c:   movt r1, #22
0005fc20:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
 98       	    std::cout << "Valor: " << f20.b << ".\n";
0005fc24:   movw r0, #58880 ; 0xe600
0005fc28:   movt r0, #28
0005fc2c:   movw r1, #11704 ; 0x2db8
0005fc30:   movt r1, #22
0005fc34:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fc38:   mov r3, r0
0005fc3a:   vldr s15, [r7, #32]
0005fc3e:   mov r0, r3
0005fc40:   vmov.f32 s0, s15
0005fc44:   blx 0xcfac <_ZNSolsEf>
0005fc48:   mov r3, r0
0005fc4a:   mov r0, r3
0005fc4c:   movw r1, #11712 ; 0x2dc0
0005fc50:   movt r1, #22
0005fc54:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
 99       	    std::cout << "Valor: " << f20.c << ".\n";
0005fc58:   movw r0, #58880 ; 0xe600
0005fc5c:   movt r0, #28
0005fc60:   movw r1, #11704 ; 0x2db8
0005fc64:   movt r1, #22
0005fc68:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fc6c:   mov r3, r0
0005fc6e:   vldr s15, [r7, #36]     ; 0x24
0005fc72:   mov r0, r3
0005fc74:   vmov.f32 s0, s15
0005fc78:   blx 0xcfac <_ZNSolsEf>
0005fc7c:   mov r3, r0
0005fc7e:   mov r0, r3
0005fc80:   movw r1, #11712 ; 0x2dc0
0005fc84:   movt r1, #22
0005fc88:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
100       	    std::cout << "Valor: " << f20.d << ".\n";
0005fc8c:   movw r0, #58880 ; 0xe600
0005fc90:   movt r0, #28
0005fc94:   movw r1, #11704 ; 0x2db8
0005fc98:   movt r1, #22
0005fc9c:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fca0:   mov r3, r0
0005fca2:   vldr s15, [r7, #40]     ; 0x28
0005fca6:   mov r0, r3
0005fca8:   vmov.f32 s0, s15
0005fcac:   blx 0xcfac <_ZNSolsEf>
0005fcb0:   mov r3, r0
0005fcb2:   mov r0, r3
0005fcb4:   movw r1, #11712 ; 0x2dc0
0005fcb8:   movt r1, #22
0005fcbc:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
101       	    std::cout << "Valor: " << f20.e << ".\n";
0005fcc0:   movw r0, #58880 ; 0xe600
0005fcc4:   movt r0, #28
0005fcc8:   movw r1, #11704 ; 0x2db8
0005fccc:   movt r1, #22
0005fcd0:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
0005fcd4:   mov r3, r0
0005fcd6:   vldr s15, [r7, #44]     ; 0x2c
0005fcda:   mov r0, r3
0005fcdc:   vmov.f32 s0, s15
0005fce0:   blx 0xcfac <_ZNSolsEf>
0005fce4:   mov r3, r0
0005fce6:   mov r0, r3
0005fce8:   movw r1, #11712 ; 0x2dc0
0005fcec:   movt r1, #22
0005fcf0:   blx 0xd174 <_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc>
281       }
0005fcf4:   movs r3, #0
0005fcf6:   b.n 0x5fcfc <main()+612>
0005fcf8:   blx 0xd27c <__cxa_end_cleanup>
0005fcfc:   mov r0, r3
0005fcfe:   add.w r7, r7, #48       ; 0x30
0005fd02:   mov sp, r7
0005fd04:   pop {r7, pc}
0005fd06:   nop

WitchLord

4,835

November 19, 2013 03:21 PM

My assembly skills are not all that great either. I can't write an assembler function from scratch, but I can at least guess my way through a disassembly and then copy-paste the instructions I need with just minor changes. So far it has been enough to make the native calling conventions work. ;)

I'll take a closer look at these disassemblies later to try to identify what may be different in the ABI for your target system.

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WitchLord

4,835

November 20, 2013 01:28 AM

The functions you disassembled all seem to follow the expected ABI. Most likely they would work if you registered them with AngelScript and called them from the script. The first function returns the structure Int4 in the r0 register, and the rest of the functions receive a hidden pointer to the memory that should be initialized with the return value in the r0 register, and also return that same pointer in the r0 register.

Can you also disassemble your asXmlDocument::getDocument class method? AngelScript as it is now will send the pointer to the asXmlDocument instance in register r1 and the address of the memory that should be initialized with the returned string in register r0. I'd like to confirm that this is what the C++ compiler expects too.

Can you make a different test for me? Download the SDK from the SVN, and compile and run the test_features project. When doing so, comment out all the tests between lines 216 and 330 in the main.cpp file (as I want to test the support for native calling convention first). Then let me know which of the subsequent tests work or do not work. You may need to comment and uncomment tests in different runs in order to bypass possible crashes caused by the native calling convention being different than expected.

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MarisA

129

Author

November 20, 2013 11:32 AM

Disassembly looks like this:


 54       void asXmlDocument::clear(){
          asXmlDocument::clear():
000471ec:   push {r7, lr}
000471ee:   sub sp, #8
000471f0:   add r7, sp, #0
000471f2:   str r0, [r7, #4]
 55       	document.Clear();
000471f4:   ldr r3, [r7, #4]
000471f6:   mov r0, r3
000471f8:   bl 0x10514 <tinyxml2::XMLDocument::Clear()>
 56       	last=NULL;
000471fc:   ldr r3, [r7, #4]
000471fe:   movs r2, #0
00047200:   str.w r2, [r3, #372]    ; 0x174
 58       }
00047204:   add.w r7, r7, #8
00047208:   mov sp, r7
0004720a:   pop {r7, pc}

--------------------------------------------------

138       std::string asXmlDocument::getDocument(){
          asXmlDocument::getDocument():
00047780:   push {r4, r7, lr}
00047782:   sub sp, #260    ; 0x104
00047784:   add r7, sp, #0
00047786:   str r0, [r7, #4]
00047788:   mov r3, r7
0004778a:   str r1, [r3, #0]
0004778c:   movw r3, #5544  ; 0x15a8
00047790:   movt r3, #29
00047794:   ldr r3, [r3, #0]
00047796:   str.w r3, [r7, #252]    ; 0xfc
139       	XMLPrinter printer(NULL,true);
0004779a:   add.w r3, r7, #16
0004779e:   mov r0, r3
000477a0:   movs r1, #0
000477a2:   movs r2, #1
000477a4:   movs r3, #0
000477a6:   bl 0x10bd0 <tinyxml2::XMLPrinter::XMLPrinter(_IO_FILE*, bool, int)>
140       	document.Print(&printer);
000477aa:   mov r3, r7
000477ac:   ldr r2, [r3, #0]
000477ae:   add.w r3, r7, #16
000477b2:   mov r0, r2
000477b4:   mov r1, r3
000477b6:   bl 0x10a40 <tinyxml2::XMLDocument::Print(tinyxml2::XMLPrinter*) const>
142       	return printer.CStr();
000477ba:   add.w r3, r7, #16
000477be:   mov r0, r3
000477c0:   bl 0x48a00 <tinyxml2::XMLPrinter::CStr() const>
000477c4:   mov r3, r0
000477c6:   mov r4, r3
000477c8:   add.w r3, r7, #12
000477cc:   mov r0, r3
000477ce:   blx 0xd72c <_ZNSaIcEC1Ev>
000477d2:   add.w r3, r7, #12
000477d6:   ldr r0, [r7, #4]
000477d8:   mov r1, r4
000477da:   mov r2, r3
000477dc:   blx 0xd2b8 <_ZNSsC1EPKcRKSaIcE>
000477e0:   add.w r3, r7, #12
000477e4:   mov r0, r3
000477e6:   blx 0xd204 <_ZNSaIcED1Ev>
000477ea:   add.w r3, r7, #16
000477ee:   mov r0, r3
000477f0:   bl 0x12108 <tinyxml2::XMLPrinter::~XMLPrinter()>
143       }
000477f4:   ldr r0, [r7, #4]
000477f6:   movw r3, #5544  ; 0x15a8
000477fa:   movt r3, #29
000477fe:   ldr.w r2, [r7, #252]    ; 0xfc
00047802:   ldr r3, [r3, #0]
00047804:   cmp r2, r3
00047806:   beq.n 0x4782a <asXmlDocument::getDocument()+170>
00047808:   b.n 0x47826 <asXmlDocument::getDocument()+166>
142       	return printer.CStr();
0004780a:   add.w r3, r7, #12
0004780e:   mov r0, r3
00047810:   blx 0xd204 <_ZNSaIcED1Ev>
00047814:   b.n 0x47816 <asXmlDocument::getDocument()+150>
139       	XMLPrinter printer(NULL,true);
00047816:   add.w r3, r7, #16
142       	return printer.CStr();
0004781a:   mov r0, r3
0004781c:   bl 0x12108 <tinyxml2::XMLPrinter::~XMLPrinter()>
00047820:   b.n 0x47822 <asXmlDocument::getDocument()+162>
00047822:   blx 0xd27c <__cxa_end_cleanup>
00047826:   blx 0xd270 <__stack_chk_fail>
0004782a:   add.w r7, r7, #260      ; 0x104
0004782e:   mov sp, r7
00047830:   pop {r4, r7, pc}
00047832:   nop

Then I compiled test_features on directly board and run test.


---------
MEMORY STATISTICS
number of allocations                 : 638387
max allocated memory at any one time  : 2610229
max number of simultaneous allocations: 57261
total amount of allocated memory      : 51658331
medium size of allocations            : 80
--------------------------------------------
All of the tests passed with success.

WitchLord

4,835

November 20, 2013 01:40 PM

The disassembly appears to be as expected.

It looks like we've been following a false trail. If all the tests in the test_feature project pass, then this is definitely not a problem with the native calling convention. I'm sorry for leading you this way.

Instead it appears to be some obscure platform specific bug. I think we'll only figure out exactly what causes the crash if you debug the code.

Or, if it would be possible to allow me to remote access your system I may be able to debug it myself.

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